Fractional-order zero-phase integrator design method used for high-order Sigma-Delta modulator

Abstract

The application discloses a fractional-order zero-phase integrator design method used for a high-order Sigma-Delta modulator. A fractional-order zero-phase integrator is applied to the high-order Sigma-Delta modulator, and noise shaping capability of the modulator is further improved on the premise of not causing phase loss. The method has the advantages that the advantage that the fractional-order zero-phase integrator has adjustable amplitudes and a constant phase is exerted, phase lagging of the high-order Sigma-Delta modulator can be avoided, and at the same time, the noise shaping capability of the modulator can also be further improved.

Description

technical field [0001] The present application relates to the field of analog-digital mixed signal processing, in particular to a design method of a fractional-order zero-phase integrator for a high-order Sigma-Delta modulator. Background technique [0002] As the functions of digital circuits become more and more powerful, the requirements for the performance of analog-to-digital converters are also getting higher and higher. The conversion accuracy of traditional analog-to-digital converters is generally not high, which cannot meet the high-precision requirements of the system. Sigma-Delta ADC is a kind of oversampling analog-to-digital converter, and it is also a kind of high-precision analog-to-digital converter. At the same time, it has lower requirements on the performance of the front-end anti-aliasing filter. Therefore, Sigma-Delta modulators are widely used in robot control, speech recognition, communication systems and other fields. Through reading a lot of litera...

AI Technical Summary

Problems solved by technology

The second-order system is full-time stable, the system structure is simple, and the circuit is easy to implement. The system only includes circuits such as sensing structures and quantizers, and does not include electrical integrators. However, due to the low order of the system, the Sigma-Delta modulator is limited. Noise shaping capability, there is a large quantization error during analog-to-digital conversion

At present, the research in the field of single-loop high-order Sigma-Delta modulators has successfully realized the design of 5-order Sigma-Delta modulators. If the order is further increased on this basis (cascaded integrators), it will inevitably cause the entire The phase lag of the Sigma-Delta modulator system, then the stability of the system will not be guaranteed

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