A high-speed security encryption Micro SD card
A secure encryption and high-speed technology, applied to record carriers, instruments, computer components, etc. used by machines, can solve the problems of increasing SoC security chip design risks, affecting product processing speed, and affecting storage speed, etc., to reduce design risks , Improve overall performance and save costs
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Embodiment 1
[0063] This embodiment provides a high-speed security encrypted Micro SD card, such as Figure 4 As shown, it includes an SD interface chip (SDIF), a security chip (SECCHIP) and a storage chip (L73A); an SD interface module and a storage controller are integrated in the SD interface chip, and the SD interface module is connected to the SD interface in communication; A cryptographic algorithm module and a COS module are integrated in the security chip; a storage module is integrated in the storage chip, and the storage module and the storage controller are connected through a Nand Flash interface. The storage module mainly provides hardware physical media such as Nand Flash for the storage of data, and responds to the data storage command sent by the storage controller.
[0064] Further, the SD interface chip is communicated with the security chip through a high-speed HSSPI interface. The HSSPI master device is integrated in the SD interface chip, and the SD interface module, ...
Embodiment 2
[0076] Such as Figure 5 As shown, the present embodiment provides a method for data transmission utilizing the high-speed securely encrypted Micro SD card of embodiment 1, comprising the steps of:
[0077] S1. The host computer terminal sends the write data command and the data to be encrypted or decrypted to the high-speed secure encrypted Micro SD card through the SD interface;
[0078] S2, the SD interface chip receives the write data command and the data to be encrypted or decrypted and parses, then the write data command and the data to be encrypted or decrypted are transmitted to the security chip through the HSSPI master device;
[0079] S3, the HSSPI in the security chip receives a 512-byte data block write data command and the data to be encrypted or decrypted from the device to its own cache, and then sets the "data transmission complete" signal flag;
[0080] S4. After the DMA module automatically detects the "data transmission complete" signal flag set by the HSS...
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