Circuit for accessing chip test mode and control method of circuit
A chip test and test mode technology, applied in the direction of measuring electricity, measuring electrical variables, digital circuit testing, etc., can solve problems such as complex operation, waste of pin resources, affecting test coverage, etc., to achieve strong operability and simple circuit , The entry method is simple and controllable
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[0052] As an embodiment of the present invention, the control method further includes a method of exiting the chip test mode, which includes, after the chip to be tested enters the current chip test mode, the counting and decoding module passes the reset input Terminal nRST receives a falling edge signal, then the chip to be tested exits the current chip test mode, and waits until the reset input terminal nRST receives the next falling edge signal, then the chip to be tested enters the next chip test mode ;
[0053] When the chip to be tested has entered the chip test mode and is being tested, the chip to be tested is forcibly exited from the chip test mode by inputting a low level to the test mode enable input terminal PTEST. When the test mode enable input terminal PTEST keeps low level, the settings of the chip test mode are cleared, but the scan test mode is not affected by it.
[0054] As an embodiment of the present invention, the control method further includes a contr...
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