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Adaptive routing method of two-dimensional on-chip network based on particle swarm algorithm

A particle swarm algorithm and on-chip network technology, applied in the field of two-dimensional on-chip network adaptive routing based on particle swarm algorithm, can solve the problems of remote area congestion, path limitations, etc., to reduce data transmission delay, achieve load balancing, The effect of high transmission quality

Active Publication Date: 2018-06-19
SOUTHEAST UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Traditional adaptive routing methods, such as DyXY, NOP, and DyAD, are based on regional congestion information of neighboring nodes (such as router buffer occupancy, etc.) for link selection, although the effect of reducing delay can be achieved to a certain extent , but the paths are limited and cause congestion in farther regions

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  • Adaptive routing method of two-dimensional on-chip network based on particle swarm algorithm
  • Adaptive routing method of two-dimensional on-chip network based on particle swarm algorithm
  • Adaptive routing method of two-dimensional on-chip network based on particle swarm algorithm

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Embodiment

[0040] Such as figure 1 As shown, a two-dimensional on-chip network adaptive routing method based on the particle swarm optimization algorithm, in the two-dimensional on-chip network, the path from the source node to the destination node is encoded as a particle, and all possible paths of the particle are encoded as the search space. There are two attributes of position and speed. The position of a particle represents the ordered number of nodes in the path, and the speed represents the degree to which the particle approaches the optimal path. The routing method includes the following steps:

[0041] S01: The source node transmits data to the destination node according to deterministic routing. After time T, select N effective paths as N initial population particles, and perform particle swarm algorithm routing selection; deterministic routing can be turn model or odd-even routing.

[0042]S02: The fitness value of each particle is determined by the delay of the path node cont...

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Abstract

The invention discloses an adaptive routing method of a two-dimensional on-chip network based on a particle swarm algorithm. A path from a source node to a destination node in a network is coded as aparticle; all possible path codes are used as a particle searching space; each particle has two attributes including the position and the speed; when routing begins, the source node performs data transmission to the destination node according to deterministic routing; N effective paths are selected as initial population particles; when particle swarm algorithm iteration is carried out, the fitnessvalue of each particle is determined by the delay of the path node included in the particle and the data throughput of the node; the value having the best fitness is found out from a current particlepopulation; simultaneously, the historically best fitness value of each particle is recorded; the position and speed variables of each particle are updated; and, after iteration is completed, the position of the particle having the historically best fitness value is the optimal routing path. By means of the method, the transmission path of a data packet in a network can be dynamically adjusted; and the whole network load is balanced while the network delay is reduced.

Description

technical field [0001] The invention belongs to the technical field of on-chip network routing, and in particular relates to a two-dimensional on-chip network self-adaptive routing method based on a particle swarm algorithm. Background technique [0002] The number of processor cores in chips with CMP (multi-processor on chip) architecture is increasing, and the bus-based interconnection method exposes the characteristics of poor scalability and single clock synchronization, which can no longer meet the growing needs of chip scale. In response to this situation, the researchers proposed the chip interconnection structure of the network on chip. In the network-on-chip, the network scale is relatively small at the beginning, and it is very simple to implement the deterministic routing method. However, as the network scale gradually increases, data transmission according to fixed rules will often cause serious local link congestion in the network. . Therefore, realizing an ef...

Claims

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Application Information

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IPC IPC(8): H04L12/721H04L12/727H04L12/729H04L12/933G06N3/00H04L45/121H04L45/125
CPCH04L45/121H04L45/124H04L45/125H04L49/109G06N3/006
Inventor 王学香郑阳齐志张阳蒋林洋孙冲冲时龙兴
Owner SOUTHEAST UNIV
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