Vertical memory device and method of manufacturing the same

Abstract

Disclosed are vertical memory devices and methods of manufacturing the same. The vertical memory device may include includes a substrate, a gate stack structure and channel structure on the substrate,and a charge trap structure between the gate stack structure and the channel structure. The gate stack structure includes conductive structures and insulation interlayer structures that are alternately stacked on each other in a vertical direction on the substrate such that cell regions and inter-cell regions are alternately arranged in the vertical direction. The channel structure penetrates through the gate stack structure in the vertical direction. The charge trap structure and the conductive structures define memory cells at the cell regions. The charge structure is configured to selectively store charges. The charge trap structure includes an anti-coupling structure in the inter-cell region for reducing a coupling between neighboring memory cells adjacent to each other in the vertical direction.

Description

technical field [0001] Example embodiments relate to vertical memory devices and methods of manufacturing the same, and more particularly, to vertical NAND flash memory devices and / or methods of manufacturing the same. Background technique [0002] In order to increase the storage capacity of NAND memory devices, vertical NAND flash memory devices in which a plurality of memory cells are vertically stacked on a substrate have been proposed. [0003] As vertical NAND flash memory devices tend to be miniaturized coupled with high stacking density of memory cells, electron diffusion and crosstalk occur more frequently between vertically adjacent stacked cells, which affects the reliability of vertical NAND flash memory devices . [0004] In order to reduce and / or minimize electron diffusion and crosstalk between vertically stacked cells, charge-trapping patterns are arranged as individual patterns by each cell in the vertical direction. [0005] As the stacking density of mem...

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Problems solved by technology

Therefore, the trap density in the charge-trapping pattern is insufficient for each cell of the vertical NAND flash memory device, which makes the memory window size of the flash memory device very variable and unstable in response to the size of the flash memory device.

[0006] In addition, the reduction of the vertical gap distance between adjacent stacked cells generally results in electron diffusion and crosstalk between adjacent stacked cells in vertical NAND flash memory devices.

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