Digital-analog hybrid charge domain neuron circuit based on CMOS process
A digital-analog hybrid, neuron technology, applied in the field of artificial neural network, can solve the problems of no automatic design tools for analog circuits, difficult overall design of large-scale analog circuits, existence of static working current, etc., to avoid transmission distortion, low cost, The effect of flexible interfaces
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[0030] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.
[0031] figure 1 A schematic structural diagram of a neuron circuit based on a CMOS process, a digital-analog hybrid, and a charge domain provided by an embodiment of the present invention. Such as figure 1 As mentioned above, it mainly includes: 4bit DAC, neuron synapse circuit, 8bit ADC, activation function circuit and sequential circuit; its structure is as follows: the described 4bit DAC, neuron synapse circuit, 8bit ADC and activation function...
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