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Fin field effect transistor forming method

A fin field effect and transistor technology, applied in semiconductor devices, electrical components, circuits, etc., can solve problems such as poor transistor performance and reliability, and achieve the effect of improving performance and eliminating blocking ability.

Active Publication Date: 2016-12-07
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] FinFETs formed with prior art techniques suffer from poorer performance and reliability as feature sizes shrink further

Method used

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Experimental program
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Effect test

Embodiment Construction

[0027] As the feature size of the fin field effect transistor formed in the prior art is further reduced, the performance and reliability of the fin field effect transistor are poor.

[0028] Figure 1 to Figure 7b It is a structural schematic diagram of the formation process of the fin field effect transistor in an embodiment of the present invention.

[0029] combined reference figure 1 , Figure 2a , Figure 2b , Figure 2c , Figure 3a , Figure 3b and Figure 3c , providing a semiconductor substrate 100, the semiconductor substrate 100 has a gate structure dense region (I region) and a gate structure sparse region (II region), the surface of the semiconductor substrate 100 has a raised fin 120 and a fin across The gate structure 130 of 120 , the gate structure 130 covers part of the top and sidewall of the fin 120 .

[0030] Figure 2a for FinFETs along the figure 1 The cross-sectional view of the fin extension direction (A-A1 axis) in the middle I region, Fi...

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Abstract

The invention discloses a fin field effect transistor forming method. The method comprises steps: a semiconductor substrate is provided, wherein the semiconductor substrate is provided with a gate structure dense region and a gate structure sparse area, and the surface of the semiconductor substrate is provided with convex fin parts and gate structures crossing the fin parts; a side wall material layer is formed, and the side wall material layer coats the fin parts and the gate structures; first etching is carried out on the side wall material layer, first side walls are formed at two sides of the fin parts in the gate structure dense region, second side walls are formed at two sides of the fin parts in the gate structure sparse region, and the first side walls and the second side walls are lower than the top surfaces of the fin parts; second etching is carried out on fin parts at two sides of the gate structures, first fin parts are formed, the first side walls are flush with the first fin parts, and the second side walls are higher than the first fin parts; third etching is carried out to reduce the height difference between the second side wall and the first fin part; and source and drain areas are formed on the first fin part. The fin field effect transistor forming method of the invention can improve the performance of the fin field effect transistor.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for forming a fin field effect transistor. Background technique [0002] MOS transistors are one of the most important components in modern integrated circuits. The basic structure of a MOS transistor includes: a semiconductor substrate; a gate structure located on the surface of the substrate, and source and drain regions located in the semiconductor substrate on both sides of the gate structure. MOS transistors generate switching signals by applying a voltage to the gate and regulating the current through the channel at the bottom of the gate structure. [0003] With the development of semiconductor technology, the control ability of the channel current of the traditional planar MOS transistor becomes weaker, resulting in serious leakage current. Fin Field Effect Transistor (Fin FET) is an emerging multi-gate device, which generally includes a fin protrudin...

Claims

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Application Information

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IPC IPC(8): H01L29/66H01L21/28
Inventor 韩秋华
Owner SEMICON MFG INT (SHANGHAI) CORP
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