Single/double/quadruple precision floating point data relevant circuit and operand acquisition method of RISC (Reduced Instruction-Set Computer) processor

Abstract

The invention provides a single / double / quadruple precision floating point data relevant circuit and an operand acquisition method of an RISC (Reduced Instruction-Set Computer) processor. The method can effectively solve the problems of high logic complexity and long time delay, can quickly judge the correlation of single / double / quadruple precision, obtains a correct floating point data source and improves the floating point assembly line frequency. Four sets of hardware logic are adopted to carry out correlation judgment and the processing of data selection of each part in parallel, the correlation judgment logic of the floating data with different precision and the complexity and long time delay of data selection logic during correlation can be eliminated. Compared with the logicthat the correlation of each execution level is determined according to a floating point operand register number in a floating point instruction and floating point operation precision and a floating point result is selected according to a correlation situation, the method disclosed by the invention has the advantages that the complexity is lowered, logic time delay is shortened, a circuit structure is clear, all of the correlation judgment preprocessing, correlation judgment logic and result selection logic can be subjected to assembly line division, and the method is suitable for each processor of different types of assembly line division.

Description

technical field [0001] The invention relates to the related design field of floating-point pipeline data, in particular to a single / double / quad precision floating-point data related circuit and an operand acquisition method of a RISC processor. Background technique [0002] At present, there have been many researches on the floating-point design of processors, but there are relatively few studies on floating-point pipelines. Since floating-point data includes single / double / quad precision, this means that single-precision floating-point 32-bit data may be related to single-, double-, and quad-precision floating-point data; double-precision floating-point 64-bit data may be related to single, double, Four-precision floating-point data is correlated, and the correlation between the upper 32-bit and lower 32-bit data in 64-bit data may be different; the quad-precision floating-point 128-bit data may be correlated with single, double, and quadruple-precision floating-point data, ...

AI Technical Summary

Problems solved by technology

[0003] Regarding single / double / quad precision floating-point data, there are many different related situations according to different precisions, and there are data related judgments based on various possible related situations, as well as the selection of operands, the problems of high logic complexity and long delay, and limitations frequency of the floating-point pipeline

The decision logic for each precision floating-point data is based solely on various possible related situations, and after determining the correlation, the selection logic of the correct data is more complicated, and the complex logic delay has become a bottleneck that limits the increase in the frequency of the floating-point pipeline.

At the same time, some processors use stall pipeline technology to determine that if data correlation occurs, they wait for the execution of the relevant floating-point instructions to complete, and then read the corresponding floating-point data from the floating-point register file. This method does not really reduce the floating-point data. At the same time, because the pipeline is paused, the throughput rate of the pipeline is reduced, and the performance of the floating-point pipeline is directly reduced.

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