A shift register, driving method, and gate driving circuit

Abstract

The invention provides a shift register, a driving method, and a gate driving circuit. The shift register includes: a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a first capacitor, and a second capacitor, And a trigger signal input terminal, a first clock signal terminal, a second clock signal terminal, a first level signal terminal, a second level signal terminal and an output terminal, the trigger signal input terminal receives a high level trigger signal, the The output end of the shift register outputs a high level signal. The shift register occupies a small layout area, which is beneficial to reducing the frame of the display panel.

Description

technical field [0001] The invention relates to the field of display technology, in particular to a shift register, a driving method, and a gate driving circuit. Background technique [0002] The rapid development of liquid crystal display technology forces liquid crystal panel manufacturers to consider not only the performance and cost of liquid crystal panels, but also the aesthetics of liquid crystal panels. In order to facilitate the design of the narrow frame of the liquid crystal panel, the relevant technicians arrange the gate drive circuit on the edge of the liquid crystal panel, and the gate drive circuit includes a plurality of shift registers connected in series. [0003] figure 1 It is a circuit structure diagram of a relatively common shift register in the prior art. like figure 1 As shown, the shift register includes a shift register unit 11 and an inverting unit 12, and the trigger signal input by the input terminal IN of the shift register unit 11 is a low...

AI Technical Summary

Problems solved by technology

like figure 1 As shown, the shift register includes a shift register unit 11 and an inverting unit 12, and the trigger signal input by the input terminal IN of the shift register unit 11 is a low level signal, that is, the shift register unit 11 is triggered by a low level, In order to realize the function of the gate drive circuit, it is necessary to arrange three cascaded inverter units 12 at the rear end of the shift register unit 11. Therefore, the number of transistors and capacitors used in the gate drive circuit is relatively large, resulting in The layout area occupied by the driving circuit is relatively large, which is not conducive to the narrow border design

More importantly, the front-stage shift register is transmitted to the subsequent-stage shift register through a separately set NEXT signal, which increases the complexity of wiring between the upper and lower-stage shift registers, and is also not conducive to narrow bezel design

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