Memory management method and device

Abstract

An embodiment of the present invention provides a memory management method and device, including: a memory manager receives a memory access request, and the memory access request carries a virtual address; If the page table entry corresponding to the virtual address is used, then the type of page fault of the virtual address is judged; if the type of page fault of the virtual address is a blank page fault, the memory manager allocates a corresponding page for the virtual address , the blank page fault refers to a page corresponding to the virtual address not allocated; the memory manager updates the page table entry corresponding to the virtual address into the memory and the TLB. By judging the page fault type of the virtual address, the memory manager does not generate a page fault interrupt when a blank page is missing, but allocates a corresponding page for the virtual address. Therefore, the method of this embodiment can reduce the occurrence of page fault interrupts. times, thereby improving memory management efficiency.

Description

technical field [0001] The embodiments of the present invention relate to computer technology, and in particular to a memory management method and device. Background technique [0002] In a modern computer system, memory management tasks are implemented jointly by the operating system, a memory management unit (Memory Management Unit, MMU for short), and a page table cache (Translation Lookaside Buffer, TLB for short). [0003] In the existing memory management process, the operating system is responsible for most of the memory management tasks, and the most frequently operated tasks of virtual and real address mapping and page lookup are implemented by hardware such as TLB and MMU. This memory management method has two inherent bottlenecks: (1) The TLB and MMU are on the critical path for the processor to access the cache. Every time the processor accesses the cache, it must first access the TLB. Once the TLB misses increase, the MMU will frequently check Pages can easily ...

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Problems solved by technology

[0005] However, the processing method of the page fault interrupt is still bound to the processor. Whether the page is checked by the MMU hardware or the operating system, as long as the page check fails, a page fault interrupt will be generated, and the processor will waste a lot of time on processing the page fault. Interrupts, making memory management inefficient

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