Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Chip automatic test method used for multi-temperature test

An automatic test, multi-temperature technology, applied in the direction of electronic circuit testing, etc., can solve the problems of inability to realize multi-temperature automatic control, a large number of temperature adjustment data collation, etc., to achieve the effect of automatic chip testing

Active Publication Date: 2015-10-28
CHIPSEA TECH SHENZHEN CO LTD
View PDF7 Cites 10 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, when simulating performance parameters, it is still impossible to realize automatic control of multiple temperatures; still need to fix a person to test and still need a lot of operations such as temperature adjustment data sorting

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Chip automatic test method used for multi-temperature test
  • Chip automatic test method used for multi-temperature test
  • Chip automatic test method used for multi-temperature test

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0042] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0043] Please refer to figure 1 Shown is a block diagram of the hardware structure adopted for realizing the present invention. As shown in the figure, general-purpose ATE equipment is used for test stimulus provision and result measurement, because ATE secondary development is more convenient, and most IC design companies have ready-made ATE equipment. Choose a high and low temperature box as the ambient temperature supply device (must have a communication interface such as serial port or GPIB). The host computer software is used to control the ATE equipment and high and low temperature boxes. ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a chip automatic test method used for multi-temperature test. The method selects an ATE as a main test excitation application and measurement device, selects a high and low temperature box as an ambient temperature supply device, and employs an upper host software to carry out master control of the ATE and the high and low temperature box, and timing temperature adjustment and timing test are achieved. After test, the upper host software is in charge of arrangement, backup and analysis of test data sent back by the ATE. Thereby, the complicated manual operation problem during total temperature environment test is solved, and therefore the test data volume of a chip to be tested in different temperature points is raised.

Description

technical field [0001] The invention belongs to the technical field of chip testing, in particular to the temperature testing of chips. Background technique [0002] With the current increase in chip complexity, test costs are gradually increasing in R&D costs. Subsequently, various schemes to reduce the cost of testing are gradually produced. The R&D front-end mostly adopts DFT design to achieve this purpose. However, for the testing of most of the simulated performance parameters, there is still no good way to measure an exact temperature curve. Therefore, after the design sample is completed, the design company still needs to make great efforts to conduct high and low temperature tests. [0003] The current test method is usually to put the chip into the temperature control equipment first, and then conduct various temperature tests: [0004] Adjust to temperature 1, test the performance of analog parameter 1, parameter 2, and parameter 3 with various equipment (or os...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/28
Inventor 宋恩琳
Owner CHIPSEA TECH SHENZHEN CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products