Transistor and formation method

Abstract

The invention provides a transistor and a formation method thereof. The formation method of the transistor includes providing a substrate and forming a plurality of insulating layers and a plurality of fake grid layers stacked at intervals on the surface of the substrate; forming a through hole in the insulating layers and the fake grid layers, wherein the bottom of the through hole is at the surface of the substrate; forming a channel layer on the surface of the through hole; removing the fake grid layers so as to form grooves between adjacent insulating layers; forming grid medium layers on the surface of the inner wall of a grooves and the surface of the channel layer; forming grids filling the grooves and the through hole on the surfaces of the grid medium layers. By adopting the above method, integration level of the transistor can be improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a transistor and a forming method thereof. Background technique [0002] MOS transistors are one of the core devices in modern semiconductor integrated circuits. MOS transistors usually include: a semiconductor substrate, a gate structure on the surface of the semiconductor substrate, and a source and drain in the semiconductor substrate on both sides of the gate structure. , the gate structure includes a gate dielectric layer and a gate located on the surface of the gate dielectric layer, and the doping type of the source and drain is consistent with the type of the MOS transistor. The integration level of the transistor has a great influence on the integration level of the chip. [0003] Since the existing transistors are generally planarly distributed on the substrate, the size of a single transistor has a great influence on the integration level of the chip. [0004]...

AI Technical Summary

Problems solved by technology

[0004] In order to further improve the integration level of the chip, the size of the transistor is also continuously reduced with the decrease of the process node, but the short channel effect of the transistor due to the size reduction is also more and more significant

[0005] How to further improve the integration of transistors is a big challenge

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