Clock system

Abstract

The present invention relates to the technical field of electronics, in particular to a clock system used in an electronic system. The clock system comprises: a host computer, connected to a PCI bus and used for setting a frequency of a clock that needs to be output and choosing a corresponding channel, wherein the host computer is provided with an upper-layer software module that is connected to the PCI bus and that is used for calculating a value of a control register of a dedicated clock chip according to the frequency, set by the host computer, of the clock that needs to be output; CPLD, connected to the PCI bus and used for acquiring the value of the control register and sending the value of the control register to the dedicated clock chip; and the dedicated clock chip, used for generating a corresponding clock signal according to the value of the control register and outputting the corresponding clock signal. According to the above technical scheme of the present invention, the output clock frequency can be set by the host computer, the clock output range is super wide, and the resolution is high. According to the present invention, a duty cycle of the output clock can also be controlled, thereby meeting system requirements on the duty cycle.

Description

technical field [0001] The invention relates to the field of electronic technology, in particular to a clock system for an electronic system. Background technique [0002] With the development of modern communication technology, the types and frequencies of clocks required by communication systems are becoming more and more diverse. As the heart of all electronic systems, the clock's performance and stability directly determine the performance of the entire system. A traditional system clock consists of a quartz crystal and amplifier. For the oscillator to work, the crystal must be in a loop with a gain amplifier to compensate for crystal losses and match impedance. This gain amplifier must also convert the levels to standard logic levels, and then generate the required system clock through the system clock distribution network. [0003] With the continuous improvement of system complexity, more and more types of clocks are required, and the requirements for clock perform...

AI Technical Summary

Problems solved by technology

[0003] With the continuous improvement of system complexity, more and more types of clocks are required, and the requirements for clock performance and stability are also getting higher and higher. It is difficult to realize the skew, jitter, I / O standard, rise and fall time and other indicators put forward the requirements

At the same time, due to the use of many discrete components, it has also caused certain difficulties in PCB design and wiring, and the electromagnetic interference and crosstalk are relatively large, which reduces the reliability of the entire system.

[0004] The clock circuit composed of FPGA can generate multi-channel and multi-frequency clock signals, which can meet certain design requirements, but after all, it is not a dedicated clock chip, the logic level of its output clock is limited, and some performance indicators are lower than dedicated clock chips. clock chip

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