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A device-level automated test platform for sram type fpga and its test method

An automated testing and platform technology, applied in the direction of instruments, measuring electricity, measuring devices, etc., can solve the problems of inability to realize continuous download of multiple programs and automated testing, and achieve the effect of high scalability

Inactive Publication Date: 2018-01-02
CHINA ACADEMY OF SPACE TECHNOLOGY
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] Commercial FPGA program download tools can only download a single program, and cannot realize continuous download and automated testing of multiple programs

Method used

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  • A device-level automated test platform for sram type fpga and its test method
  • A device-level automated test platform for sram type fpga and its test method

Examples

Experimental program
Comparison scheme
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Embodiment Construction

[0028] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0029] A device-level automated test platform applied to FPGA for aerospace models, characterized in that it includes: a server (Server), a programmer (Programmer), a tester host (Tester) and a test interface board (DIB); the test interface board Including the tested FPGA and auxiliary hardware configuration circuit;

[0030] The server and the programmer exchange data through a USB connection, the server connects to the tester host through a local bus (LocalBus) for data exchange, and the programmer configures the program of the FPGA under test through the JTAG interface of the FPGA under test , the host of the tester provides power to the FPGA under test through a DPS power supply module (Device Power Supply).

[0031] Power supply and measure its operating current, apply a test stimulus signal to the FPGA under test through a digital channel (Digita...

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PUM

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Abstract

The invention relates to an FPGA device-level automated testing platform and method, in particular to a device-level automated testing platform and method applied to Vertix-4 series SRAM type FPGAs. A device-level automated testing platform applied to FPGA is characterized in that it includes: server, programmer, tester host and test interface board; said test interface board includes tested FPGA and auxiliary hardware configuration circuit; said server and programming The server performs data exchange through a USB connection, the server is connected to the tester host through a local bus for data exchange, the programmer configures the program of the FPGA under test through the JTAG interface of the FPGA under test, and the tester host passes the DPS The power supply module provides power for the FPGA under test and measures its operating current, applies test excitation signals to the FPGA under test through digital channels and samples the test results.

Description

technical field [0001] The invention relates to an FPGA device-level automated testing platform and method, in particular to a device-level automated testing platform and method for Vertix-4 series SRAM FPGAs used in aerospace models. Background technique [0002] Xilinx's Vertix-4 series SRAM FPGA is a complex device used in a large number of aerospace models. At present, there is a lack of device-level testing methods in China, and it does not have the ability to test and implement. [0003] SRAM-type FPGA has many internal resources (such as IOB, CLB, BRAM, DSP, DCM, etc.), and it needs to configure the FPGA through special software (or hardware) before testing to make it a "circuit" with fixed functions. test. [0004] FPGA's programmable resources usually have multiple working modes, and multiple configurations and tests are required to achieve high test coverage. For example, programmable BRAM memory can be configured into various structures such as 16K×1, 8K×2, 512×...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01R31/00
Inventor 王贺陈罗婧汪悦傅丹膺张大宇陈志强匡潜玮袁春柱张松
Owner CHINA ACADEMY OF SPACE TECHNOLOGY
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