Multi-channel physical interface connection system and method

Abstract

The invention discloses a multi-channel physical interface connection system and method. The system comprises an MAC layer, a PHY layer and an AUI interface. The MAC layer comprises an MAC module, an MII interface, a plurality of first PINs and at least one group of reorganization modules; a plurality of logic channels are disposed between the MII interface and the MAC module; the first PINs and the logical channels are arranged correspondingly; the PHY layer comprises a plurality of second PINs; the AUI interface is used for connecting the MAC layer and the PHY layer and is used for forming a plurality of logic channels which are arranged successively between the first PINs and the second PINs; at least one group of the reorganization modules performs re-mapping on the logic channels and the physical channels respectively to achieve one-to-one correspondence between the logic channels and the physical channels. By means of the connection system and method, the reorganization modules perform re-mapping on the plurality of the logic channels and the physical channels to achieve one-to-one correspondence between the logic channels and the physical channels, and accordingly, the MAC layer can be adapted to the PHY layer with PINs in various sequences, and the multi-channel layer application flexibility is improved.

Description

technical field [0001] The invention relates to the Ethernet interface technology, in particular to a multi-channel physical interface connection system and a connection method thereof. Background technique [0002] IEEE802.3 10G Ethernet defines the XAUI interface to extend the 74-bit XGMII interface, which can be used to connect the Ethernet MAC layer with the PHY layer. In most typical applications where the Ethernet MAC layer is connected to the PHY layer, the XAUI interface can be used to replace or extend the XGMII interface. [0003] The XAUI interface is a low-pin, spontaneous clock serial bus directly developed from the PHY layer of 1000Base-X. The speed of the XAUI interface is 2.5 times that of 1000Base-X. By adjusting 4 serial lines, this 4bit The XAUI interface can support the data throughput of 10G Ethernet which is 10 times that of Gigabit Ethernet. The XAUI interface uses the same 8B / 10B transmission encoding as 1000Base-X, and provides high-quality complet...

AI Technical Summary

Problems solved by technology

[0005] Regardless of the interconnection between the MAC layer and the PHY layer, the interconnection between the MAC layer chip and the PHY layer chip, or the interconnection between the MAC layer and the PHY layer through the backplane, the four logical channels must correspond to the physical channels one by one, which makes the system PCB board and backplane routing have many limitations and constraints

like figure 2 As shown, when there is no one-to-one correspondence between the PIN pin sequence of the PHY layer and the PIN pin sequence in the MAC layer, in order to ensure that the PIN pin of the PHY layer is connected to the corresponding PIN pin in the MAC layer, the PHY layer and the MAC layer Connecting cables (that is, physical channels) need to be cross-set, resulting in affected signal quality

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