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A performance analysis method of barrier operation based on trigger operation

A trigger operation and analysis method technology, which is applied in the field of barrier operation performance analysis based on trigger operation, can solve the problems that the minimum execution time of aggregate communication operations cannot be obtained, and the analysis method of aggregate communication performance is not given, so as to reduce the running test of Barrier algorithm The machine time, parallel program performance optimization, and the effect of reducing complexity

Active Publication Date: 2017-02-15
NAT UNIV OF DEFENSE TECH
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Problems solved by technology

However, this patent document does not provide a performance analysis method for aggregated communication based on trigger operations, resulting in the optimization method of this patent being unable to obtain the minimum execution time of aggregated communication operations
[0007] To sum up, there are no relevant reports on the performance analysis method of Barrier aggregation communication based on trigger operation in the interconnection network of high-performance parallel computers in the current patents and literatures. In the field of performance evaluation of high-performance computer systems, there is an urgent need for a performance analysis method based on trigger-based Barrier aggregation communication

Method used

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  • A performance analysis method of barrier operation based on trigger operation
  • A performance analysis method of barrier operation based on trigger operation
  • A performance analysis method of barrier operation based on trigger operation

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Embodiment Construction

[0028] Such as figure 1 As shown, this embodiment is applied to the TH-1A high-performance parallel computer system of the National Defense University for experimental verification. The high-performance parallel computer system includes a management and login node, a computing node array, a high-performance interconnected communication network, and a global shared storage system. The communication network is connected with the global shared storage system.

[0029] Such as figure 2 As shown, the main memory in each computing node is connected to the storage controller in the processor through the system bus, the peripheral controller in the processor is connected to the storage controller, and the peripheral controller is connected to the network interface unit through the PCI bus , the network interface unit includes a peripheral interface unit, a peer-to-peer communication unit, an aggregated communication unit and a network transmission unit, and the network interface un...

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Abstract

The invention discloses a Barrier operation property analysis method based on triggering operation. The Barrier operation property analysis method comprises the following steps: 1) generating a triggering operation topological tree according to data transmission relationship for executing Barrier operation; 2) describing Barrier operation into a primitive sequence in an instruction stream mode; 3) analyzing data communication expense of an automatic execution component for trigging the operation; 4) calculating the execution time corresponding to the primitive sequence, of Barrier operation of each process in a process set according to the data communication expense; 5) selecting the execution time of the process with the longest execution time as the minimum execution time obtained from analysis. By adopting the Barrier operation property analysis method, the property of a Barrier algorithm can be estimated under the condition that the Barrier algorithm is not needed to be operated on parallel computers, so that the Barrier operation property analysis method has the advantages that the complexity of Barrier algorithm design and testing is low and the machine-hour of the Barrier algorithm operation testing is short.

Description

technical field [0001] The invention relates to the field of Barrier operation design of parallel computer interconnection network, in particular to a barrier operation performance analysis method based on trigger operation. Background technique [0002] In recent years, with the development of high-performance computing technology, the system scale of parallel computers has continued to expand. For high-performance parallel computers, manufacturers and scientific research institutions began to study faster and more powerful interconnection networks. On the one hand, the bandwidth of the network is gradually increasing, and the delay is gradually decreasing; on the other hand, the software overhead of the operating system and the application software on it using the interconnection network takes up an increasing proportion of network communication time. [0003] However, with the expansion of the parallelism of parallel programs, the proportion of program execution time occ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/36
Inventor 廖湘科谢旻卢宇彤所光曹宏嘉张百达
Owner NAT UNIV OF DEFENSE TECH
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