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Data terminal equipment and interface clock control method

A data terminal equipment and interface technology, applied in the direction of data exchange network, electrical digital data processing, digital transmission system, etc., can solve the problems that the interface timing margin cannot meet the sampling requirements, the port protocol cannot be connected successfully, etc.

Active Publication Date: 2016-08-03
HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a data terminal device to solve the problem that the interface timing margin cannot meet the sampling requirements and the port protocol cannot be successfully connected without manual intervention and without adding chips

Method used

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  • Data terminal equipment and interface clock control method
  • Data terminal equipment and interface clock control method
  • Data terminal equipment and interface clock control method

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Embodiment Construction

[0028] The technical solutions of the present invention will be further described in detail below through the accompanying drawings and embodiments.

[0029] Such as figure 1 As shown, the embodiment of the present invention provides a data terminal equipment DTE, where the DTE includes a processor 110, a framer (Frammer) 120, and an SA interface 130.

[0030] The processor 110 has a plug-in determination pin 111 which is connected to the plug-in signal pin 131 on the SA interface 130 through a signal line.

[0031] The plug-in signal pin 131 on the SA interface 130 is in a high level state when the DTE device is not docked with the data communication device DCE. Therefore, the state of the plug-in determination pin 111 is also at the default level. In different implementations In the mode, the default level can be high or low.

[0032] The framer 120 and the processor 110 implement data communication through the communication interface between the framer 120 and the processor 110, an...

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Abstract

The invention relates to data terminal equipment which comprises a processor, a framer and an SA (synchronous and asynchronous) interface. The processor is provided with a plugging judgment pin, the framer is in communication with the processor, and the SA interface is provided with a plugging signal pin. The plugging signal pin is connected to the plugging judgment pin of the processor. The processor judges the DTE (data terminal equipment) and DCE (data communication equipment) to complete butt joint during jumping of signals of the plugging judgment pin by detecting the signals of the plugging judgment pin; after butt joint of the DTE and the DCE, the processor inquires the port state of the SA interface through the framer; when the port state shows that a physical layer is connected successfully but a protocol layer fails to negotiate, the processor inquires whether or not wrong packages exist in received messages of the SA interface, and if yes, the framer sends control commands to control the SA interface to overturn to receive a clock. Through the DTE, automatic overturning of the clock of the SA interface can be realized.

Description

Technical field [0001] The invention relates to the field of communication equipment, in particular to a data terminal equipment and an interface clock control method. Background technique [0002] As a traditional communication interface, the synchronous and asynchronous (English: synchronous and asynchronous, abbreviation: SA) interface is more common in the communication industry. The interface can be configured as a synchronous serial port or an asynchronous serial port according to the actual situation. When used as a synchronous serial port, it is mainly used to support low-density wide area network (widearea network, WAN) convergence and traditional protocol transmission. SA interface supports different interface protocols, such as the International Telecommunication Union Telecom Standardization Group (English: ITUTelecommunication Standardization Sector, abbreviation: ITU-T) V.35, ITU-TX.21, ITU-TV.24, Electronic Industries Association (English: ElectronicIndustriesAssoc...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/38H04L12/26H04L29/06
Inventor 彭爱民刘坤刘立达芦超陈锐
Owner HUAWEI TECH CO LTD
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