Semiconductor memory system using regression analysis and read method thereof

Abstract

Provided are a memory system and a read method thereof. The memory system includes: a bit counter and a regression analyzer. The bit counter is configured to generate a plurality of count values based on data read from selected memory cells using a plurality of different read voltages, each of the plurality of count values being indicative of a number of memory cells of a memory device having threshold voltages between pairs of the plurality of different read voltages. The regression analyzer is configured to determine read voltage for the selected memory cells based on the plurality of count values using regression analysis.

Description

[0001] Cross References to Related Applications [0002] This application claims priority under U.S.C §119 to Korean Patent Application No. 10-2012-0119106 filed with the Korean Intellectual Property Office on Oct. 25, 2012, the entire contents of which are hereby incorporated by reference. technical field [0003] The inventive concept described herein relates to a semiconductor memory device, and more particularly, to a memory system capable of deciding a read level at high speed and a read method thereof. Background technique [0004] Semiconductor memory devices may be volatile or nonvolatile. Volatile semiconductor memory devices can perform read and write operations at high speed, and the contents stored in them may be lost when the power is turned off. A nonvolatile semiconductor memory device retains the contents stored therein even when power is lost. Non-volatile semiconductor memory devices can be used to store content that must be retained regardless of power-o...

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Problems solved by technology

However, memory cells in MLC memory devices must have threshold voltages corresponding to four or more distinguishable data states within a limited voltage window

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