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Universal device and method for protocol conversion

A protocol conversion and protocol data technology, applied in the field of virtual simulation experiment, can solve the problems of low conversion efficiency and conversion accuracy, and achieve the effect of improving conversion efficiency and conversion accuracy

Inactive Publication Date: 2014-03-26
HARBIN INST OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The present invention aims to solve the problems of low conversion efficiency and low conversion precision in the existing method of protocol conversion through software, and the present invention provides a general protocol conversion device and method

Method used

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  • Universal device and method for protocol conversion

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Experimental program
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specific Embodiment approach 1

[0047] Specific implementation mode one: see figure 1 Describe the present embodiment, a kind of general protocol conversion device described in the present embodiment, it comprises two JTAG interface modules 1, 96 needle extension interface modules 2, RJ45 interface module 3, FPGA4, signal processor 5 and memory 6,

[0048] The burning program signal output end of one of the JTAG interface modules 1 is connected to the FPGA4 burning program signal input end, and the burning program signal output end of the other JTAG interface module 1 is connected to the signal processor 5 burning program signal input end connect,

[0049]The uplink protocol data signal output end of the 96-pin expansion interface module 2 is connected to the FPGA4 uplink protocol data signal input end, and the downlink protocol data signal input end of the 96-pin expansion interface module 2 is connected to the FPGA4 downlink protocol data signal output end,

[0050] The interrupt signal output end of FPGA...

specific Embodiment approach 2

[0052] Specific implementation mode two: see figure 1 and 2 Describe this embodiment, the difference between this embodiment and a kind of general protocol conversion device described in the specific embodiment one is that the FPGA4 includes a receiving buffer unit 4-1, a protocol matching module 4-2, a register module 4- 3 and transmit buffer unit 4-4,

[0053] The data signal input end of the described receiving buffer unit 4-1 is connected with the protocol matching module 4-2 data signal input end as the FPGA4 uplink protocol data signal input end, and the uplink protocol data signal input end of the receiving buffer unit 4-1 and Sending cache unit 4-4 downlink protocol data signal input is connected as the up and down protocol data input and output terminals of FPGA4 and the up and down protocol data input and output terminals of signal processor 5,

[0054] The data signal output end of the sending buffer unit 4-4 is used as the FPGA4 downlink protocol data signal outp...

specific Embodiment approach 3

[0058] Specific implementation mode three: see figure 1 , 2 and 3 illustrate this embodiment, the difference between this embodiment and the general-purpose protocol conversion device described in the third embodiment is that the acquisition process of the protocol matching module 4-2 is that 64 protocol matching units 4 -2-1 forming a protocol matching unit array, the protocol matching unit array is added with auxiliary function logic, and finally a protocol matching module 4-2 is obtained;

[0059] The protocol matching unit 4-2-1 is used to perform protocol matching on the received uplink protocol data signal, and send the matching result to the matching result signal input end of the signal processor 5,

[0060] The auxiliary function logic includes a 64-bit AND module, a 64-bit OR module, a 64-bit priority encoder and an 8-bit trigger,

[0061] The 64-bit priority encoder encodes the priority of match_ris, and match_ris is the match occurrence signal,

[0062] The 64-b...

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Abstract

The invention relates to a universal device and a universal method for protocol conversion, which belong to the field of virtual simulation tests. The existing problem of low conversion efficiency and precision in the protocol conversion by software is solved. The device comprises two JTAG interface modules, a 96-pin extension interface module, an RJ45 interface module, an FPGA, a signal processor and a memory, wherein the FPGA comprises a receiving buffer unit, a protocol matching module, a register module and a sending buffer unit. The FPGA stores the protocol data input by a 96-pin extension interface module into a receiving buffer unit and meanwhile sends to a protocol matching module for matching, the result is stored in a register module after the protocol matching module completes protocol matching, and the data in a receiving buffer unit and the information in a register region can be accessed by a signal processor through an external memory interface; the protocol conversion is performed through the signal processor and the conversion result is sent out through the signal processor. The universal device and the method are specifically applied in the field of protocol conversion.

Description

technical field [0001] The invention belongs to the field of virtual simulation experiment. Background technique [0002] The distributed virtual simulation experiment is built on the basis of Ethernet, and a large number of virtual, semi-physical, and real-installed devices participate. When the installed equipment participates in the virtual simulation test, because the data format of the installed equipment does not match the data format of the virtual test system, protocol conversion is required. Aiming at this problem, one solution is to use the interface board to connect the test equipment to the computer, and develop protocol conversion software on the computer, but the software conversion has disadvantages such as low efficiency, large time delay and uncertain delay time. In the simulation test with high real-time requirements, the real-time performance of data and command transmission and equipment response has a decisive impact on the success of the simulation tes...

Claims

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Application Information

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IPC IPC(8): H04L29/06
Inventor 魏长安许永辉赵嘉宇谢东周邓舒予姜守达
Owner HARBIN INST OF TECH
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