Non-volatile semiconductor memory device and readout method thereof

Abstract

A non-volatile semiconductor device includes: memory strings formed by series connection of memory cells respectively connected to word lines, wherein each memory string is connected between a bit line and a source line via first and second select gate transistors; and a control circuit controlling the first and second select gate transistors, such that when voltage of the word line is raised to a predetermined value for data readout from the memory cell, a first status where the first select gate transistor is turned on and the second select gate transistor is turned off and second status where the first select gate transistor is turned off and the second select gate transistor is turned on are generated alternately.

Description

technical field [0001] The present invention relates to an electrically rewritable nonvolatile semiconductor storage device (EEPROM) such as a flash memory and a reading method thereof. Background technique [0002] A plurality of memory cell transistors (hereinafter referred to as memory cells) connected in series between the bit line and the source line form a NAND string, and a plurality of NAND strings are highly integrated to form a NAND type non-volatile semiconductor storage device. Technology. [0003] For a standard NAND type non-volatile semiconductor memory device, the erasing operation is performed by applying a high voltage (eg, 20V) to the semiconductor substrate and 0V to the word line. Thereby, electrons are extracted from the floating gate (that is, the charge accumulation layer composed of polysilicon, etc.), so that the threshold value is lower than the erasing threshold value (eg -3V). On the other hand, the writing operation is performed by applying 0V...

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However, in this case, there is a problem of prolonged sensing time

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