Interrupt realization method between virtual processors, relevant device and system

Abstract

The embodiment of the invention discloses an interrupt realization method between virtual processors. The method comprises the following steps that when a source virtual processor needs to trigger the interrupt to a target virtual processor, the information comprising the target virtual processor and registering data used for expressing indication data of the interrupt triggered from the source virtual processor to the target virtual processor are written into a virtual register of a vAPIC (virtual advanced programmable interrupt controller) of the source virtual processor so that a virtual machine monitor analyzes the information of the target virtual processor and the indication data from the virtual register, and in addition, the virtual machine monitor fills the interrupt between the virtual processors into the target virtual processor according to the indication data and the information of the target virtual processor. Correspondingly, the embodiment of the invention also provides a relevant virtual machine, a virtual controller, a calculation node and a system. The performance of the virtual machine can be improved according to the embodiment of the invention.

Description

technical field [0001] The present invention relates to the communication field, in particular to a method for realizing interruption between virtual processors, a related device and a system. Background technique [0002] At present, virtual machines have been widely used, and interrupts often occur in virtual machine applications. For example, when multi-tasks are running in a multi-processor system (Symmetrical Multi-Processing, SMP) and are not bound, the load balancing scheduling will Interrupts occur frequently, for example, Inter-Processor Interrupts (IPIs) occur, and of course other interrupts may also occur. The interrupts are implemented by accessing the registers of the Advanced Programmable Interrupt Controller (APIC). The specific implementation process is as follows: [0003] Read the delivery status (delivery status) value in the APIC's virtual interrupt command register (virtual Interrupt Command Register, vICR); [0004] Write the identity of the local AP...

AI Technical Summary

Problems solved by technology

[0006] It can be seen that the above interrupt implementation process needs to perform three operations to the APIC, which leads to three virtual machine exits (Virtual Machine exit, VM-Exit). Among them, VM-Exit can specifically understand the context switch between the virtual machine and the Hypervisor

However, in practical applications, the virtual processor will frequently be interrupted, that is, the virtual machine will appear VM-Exit more frequently, resulting in a decrease in the performance of the virtual machine.

Images