An address mapping method in the flash memory translation layer of a solid-state disk

Abstract

The invention discloses an address mapping method in a flash memory conversion layer of a solid-state disk. The implementation steps are as follows: 1) Establish a cache mapping table, a cache split table, a cache conversion table and a global conversion directory in SRAM in advance; 2) Receive an IO request , if it is a write request, skip to step 3), otherwise, skip to step 4); 3) first search the hit status of the current IO request in the SRAM table, complete the write operation according to the hit mapping information, and according to the hit type and valve The value size caches the mapping information; 4) Prioritizes the hit status of the current IO request in the SRAM table, and completes the read operation through the hit mapping information in the SRAM. The present invention has the advantages of being able to improve the random write performance of the solid-state disk while prolonging the service life of the solid-state disk, high efficiency of the flash conversion layer, high hit rate of address mapping information in the SRAM, and less additional read and write operations between the SRAM and the solid-state disk Flash .

Description

technical field [0001] The invention relates to the technical field of solid-state disk storage, in particular to an address mapping method in a flash memory translation layer of a solid-state disk. Background technique [0002] NAND Flash-based Solid State Drive (SSD) is a non-volatile computer storage device, which can effectively improve the performance of the storage system by virtue of its low latency, low power consumption, high reliability and other advantages. In the field of enterprise and consumer storage, solid-state disks are gradually replacing traditional mechanical hard disks, and the development of high-performance solid-state disk systems has become a research hotspot in the current storage field. [0003] NAND Flash has three basic operations of reading, writing, and erasing, and its main features are described as follows: [0004] 1. Erase before write mechanism, that is, when rewriting new data to a data block that has already been written, NAND Flash ca...

AI Technical Summary

Problems solved by technology

[0004]1. Erase before write mechanism, that is, when rewriting new data to a data block that has already been written, NAND Flash cannot directly update the original data block like a disk , but the data block needs to be erased and then rewritten with new data

[0005]2. The number of erasing of a single storage unit is limited, that is, the number of times of erasing each data block (Block) in NAND Flash is limited. After the number of times, the integrity and correctness of the data stored in the data block cannot be guaranteed

Therefore, according to the characteristics of NAND Flash, how to effectively use the principle of time locality and space locality of the load to improve the hit rate of page mapping information in the SRAM cache and finally improve the efficiency of the flash conversion layer has become a key technology to be solved urgently Problem, there is no effective design method to improve the efficiency of the flash translation layer by synergistically using the principle of load time locality and space locality in the existing technology

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