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Shifting register unit, gate drive circuit and display circuit

A shift register and drive module technology, applied in the field of display devices, shift register units and gate drive circuits, can solve the problems of increasing signal lines, increasing wiring difficulty, gate drive circuit signal output, high power consumption, etc.

Active Publication Date: 2013-10-23
BOE TECH GRP CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, by figure 1 The gate drive circuit composed of the shift register units shown has high power consumption and is prone to noise, and after multi-level connection, two virtual shift register units are required to work normally; in general, the above The design structure and signal input of the two virtual shift register units are different from other shift register unit structures in the circuit, and signal lines need to be added to the virtual ones to provide signals for the register units, thus increasing the difficulty of wiring and gate The signal output of the pole drive circuit increases the power consumption of the gate drive circuit

Method used

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  • Shifting register unit, gate drive circuit and display circuit
  • Shifting register unit, gate drive circuit and display circuit
  • Shifting register unit, gate drive circuit and display circuit

Examples

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Embodiment Construction

[0020] An embodiment of the present invention provides a shift register unit, a gate drive circuit, and a display device, which are used to suppress interference noise caused by changes in an AC clock signal and improve the stability of the shift register unit.

[0021] The present invention will be described below in conjunction with the accompanying drawings.

[0022] Embodiment 1 of the present invention provides a shift register unit, the structure of which is as follows figure 2 shown, from figure 2 As can be seen from the figure, the registers include: an input module 201, an output module 202, a pull-down driver module 203, a pull-down module 204 and a reset module 205;

[0023] The input module 201 is connected to an input signal terminal, and is used to respond to the input signal and provide the input signal to a pull-up node, and the pull-up node is a connection point between the input module and the output module;

[0024] The output module 202 is connected to ...

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PUM

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Abstract

The invention provides a shifting register unit, a gate drive circuit and a display device, which are used for suppressing interfering noise caused by the change of alternating-current clock signals and improving the stability of the shifting register unit. The shifting register unit comprises an input module for responding to an input signal and charging a pull-up node, a pull-down module for responding to a voltage signal of a pull-down node and providing a low voltage signal for the pull-up node and an output terminal, a pull-down driving module for responding to a voltage signal of the pull-up node and discharging to the pull-down node, an output module for responding the voltage signal of the pull-up node and providing a first clock signal for the output terminal, and a reset module for responding to a second clock signal and discharging to the output terminal.

Description

technical field [0001] The invention relates to the technical field of liquid crystal display, in particular to a shift register unit, a gate drive circuit and a display device. Background technique [0002] The thin film transistor liquid crystal display (TFT-LCD) driver mainly includes a gate drive circuit and a data drive circuit. The pole driving circuit may be formed in the same process as the TFTs and simultaneously formed on the LCD panel together with the TFTs. The gate driving circuit includes a shift register unit having multiple stages, and each stage is connected to a corresponding gate line to output a gate driving signal. The stages of the gate drive circuit are connected to each other, the start signal is input to the first stage of each stage and the gate drive signal is sequentially output to the gate line, wherein the input terminal of the current stage is connected to the output terminal of the previous stage , and the output terminal of the next stage i...

Claims

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Application Information

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IPC IPC(8): G09G3/36G11C19/28
CPCG09G3/3677G09G3/3688G09G3/3696G09G2300/0809G09G2300/0842G09G2310/0286G11C19/28
Inventor 郝学光安星俊柳奉烈
Owner BOE TECH GRP CO LTD
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