Method for realizing counter counting control and network chip

A network chip and counting control technology, which is applied in digital data processing, message numbering/character counting, instruments, etc., can solve the problem of large computing burden on the processor, and achieve the effect of ensuring computing efficiency

Inactive Publication Date: 2016-07-06
ZTE CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, the disadvantage of this counting method is that it requires the processor to continuously sample the counter, which imposes a large computational burden on the processor.

Method used

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  • Method for realizing counter counting control and network chip
  • Method for realizing counter counting control and network chip
  • Method for realizing counter counting control and network chip

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Embodiment Construction

[0013] It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0014] Such as figure 1 As shown, the system architecture diagram of the preferred embodiment of the network chip of the present invention. The network chip 1 is used to process network communication data, which may be a network processor (Network Processor, NP) or any other suitable network communication data processing chip.

[0015] The network chip 1 includes a processor 10 , a packet generator 11 , a message processing engine 12 and a counter 13 .

[0016] The counter 13 may be an internal or external memory (such as a static random access memory, etc.), which includes n bits of counting bits, and will overflow and reverse when it reaches 2n-1.

[0017] The processor 10 is configured to configure the packet generator 11 to configure the generation cycle of the counting scan message and the content of the counti...

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Abstract

The invention provides a counter counting control method in a network chip. The system realizes the periodic counting state diagnosis of the counter in the network chip by using the packet generator and the message processing engine, which avoids the processor from constantly sampling the counter to confirm the state of the counter, and ensures the operation efficiency of the processor. The invention also provides a network chip using the method.

Description

technical field [0001] The invention relates to a network chip control technology, in particular to a method for realizing counter counting control and a network chip. Background technique [0002] Today's network is developing at an astonishing speed. The growth of network traffic and the continuous emergence of new services require network equipment to have rapid and flexible processing capabilities, and furthermore, the core of network equipment—the network chip (for example, Network Processor, network processor) performance requirements are also demanding Higher and higher. Usually, there are many types of counters in the network chip, which are used to realize port statistics, flow statistics, etc., and each entry of the counter defines a certain number of BIT bits, and its width determines the maximum value of the counter, such as 10 BIT, then The maximum value is 1023. If it exceeds this value, it will overflow and reverse, and start counting again from 0. [0003] ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/08
CPCH04L12/08H04L47/00H04L43/02H04L43/16H04L43/08G06F11/0721G06F11/076
Inventor 姜海明刘建成
Owner ZTE CORP
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