Method and system for adjusting capacity of a process stage with residence time limitation
A technology of dwell time and stage, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems affecting yield, affecting wafer yield, etc., and achieve the effect of avoiding the impact of yield
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[0023] In order to rationally configure the production capacity of each process stage and achieve a win-win situation for both quality and production capacity, this invention provides a method for adjusting the production capacity of a process stage with a residence time limit. Please refer to figure 1 Shown is a schematic flow diagram of a method for adjusting the capacity of a process stage with a residence time limitation according to an embodiment of the present invention, comprising:
[0024] Step S1, obtaining the current process stage with a residence time limit, obtaining the specified residence time of the current process stage, production capacity, and the number of products currently waiting to be produced;
[0025] Step S2, obtaining the maximum residence time of the current process stage based on the specified residence time, production capacity, and the number of products currently waiting to be produced in the current process stage;
[0026] Step S3, if the maxi...
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