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Debugging multithreaded code

A technology for code and debugging applications, applied in the field of mechanisms, systems/devices that provide support for debugging multithreaded code, and can solve problems such as disrupting parallel program timing, masking errors, and being difficult to find.

Inactive Publication Date: 2012-12-26
IBM CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Thus, there will be situations where the bug sometimes manifests itself, or worse, the bug may rarely manifest itself, making it difficult to detect
In addition, many conventional techniques for sequential debugging can disturb the timing of parallel programs so that the occurrence of errors is masked when the debugging session is open, causing the errors to appear only later when the debugging tool is disengaged

Method used

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  • Debugging multithreaded code
  • Debugging multithreaded code
  • Debugging multithreaded code

Examples

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Embodiment Construction

[0016] The exemplary embodiments provide a mechanism to provide debugging support for multi-threaded computer code. The mechanisms of the exemplary embodiments provide hardware support that enables applications to track memory accesses to multiple ranges in memory. The hardware support includes content addressable memory (CAM) structures, which can be set by the application or a debugger controlling the application. Each entry in the CAM structure has a start address, which specifies the start address of the monitored memory range. The entry also includes a length field, a storage bit (or S bit) and a load bit (or L bit), the length field specifies the size of the monitored memory range corresponding to the entry, the storage bit and A load bit enables detection of memory stores and loads, respectively, to the memory range defined by the start address and length.

[0017] At the hardware level, the processor checks every access to memory within a running thread. If the addr...

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Abstract

Mechanisms are provided for debugging application code using a content addressable memory. The mechanisms receive an instruction in a hardware unit of a processor of the data processing system, the instruction having a target memory address that the instruction is attempting to access. A content addressable memory (CAM) associated with the hardware unit is searched for an entry in the CAM corresponding to the target memory address. In response to an entry in the CAM corresponding to the target memory address being found, a determination is made as to whether information in the entry identifies the instruction as an instruction of interest. In response to the entry identifying the instruction as an instruction of interest, an exception is generated and sent to one of an exception handler or a debugger application. In this way, debugging of multithreaded applications may be performed in an efficient manner.

Description

Background technique [0001] The present application relates generally to improved data processing apparatus and methods, and more particularly to mechanisms providing support for debugging multi-threaded code. [0002] In the current state of the art, writing computer programs to run in multiple threads is an accepted method for improving application performance. Unlike single-threaded applications, which execute instructions sequentially in program order, multithreaded applications improve performance by running multiple threads simultaneously on the various processing components of the system. Performance is improved because multiple processors or hardware threads often run multithreaded code, helping applications complete their tasks in less time. [0003] However, development of multithreaded applications remains a difficult task because programmers often have to insert synchronization code to make threads behave in the desired manner in order to compute equivalent result...

Claims

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Application Information

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IPC IPC(8): G06F11/36
CPCG06F11/3636G06F11/3648G06F9/3824
Inventor E·N·埃尔诺扎伊A·盖特
Owner IBM CORP
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