Testing and locating method for FPGA (field programmable gate array) programmable logic unit

Abstract

The invention discloses a testing and locating method for an FPGA (field programmable gate array) programmable logic unit, comprising the following steps of: (1) arranging and configuring an FPGA logic unit; (2) initializing a CLB (configurable logic block) in the FPGA unit; and (3) testing and locating an error CLB module. By adopting the technical scheme of the invention, configuration frequency in a CLB testing process is reduced by more than 10 times, and CLB testing efficiency is greatly improved; and error locating in a process of testing the CLB unit in the FPGA is realized.

Description

technical field [0001] The invention belongs to the technical field of integrated circuit testing, in particular to a method for testing and positioning an FPGA programmable logic unit. Background technique [0002] FPGA (Field-Programmable Gate Array), that is, Field Programmable Gate Array, is a product of further development on the basis of programmable devices such as PAL, GAL, and CPLD. It emerged as a semi-custom circuit in the field of application-specific integrated circuits (ASIC), which not only solves the shortcomings of custom circuits, but also overcomes the shortcomings of the limited number of original programmable device gates. [0003] FPGA adopts the concept of logic cell array LCA (Logic Cell Array), which includes three parts: configurable logic module CLB (Configurable Logic Block), input and input module IOB (Input Output Block) and internal wiring (Interconnect). The basic features of FPGA: 1) Using FPGA to design ASIC circuits (application-specific i...

AI Technical Summary

Problems solved by technology

In general, testing a programmed circuit takes less time, while configuring / programming an FPGA takes several times the time of testing a programmed circuit

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