Bus structure for interconnecting microcomputer with peripheral equipment

Abstract

The embodiment of the invention discloses a bus structure for interconnecting a microcomputer with peripheral equipment. The bus structure consists of a clock line SCL (Serial Clock Line) and N data lines SDA (Serial Data Line), wherein the number of the data lines is selected according to the actual requirements; the total width of the bus structure is N+1; and the peripheral equipment is connected with a host CPU (Central Processing Unit) by the N data lines and one clock line of the bus structure. By the bus structure, the parallel and bidirectional transmission of N bits of data is implemented; and the data lines are expanded so that the data transfer rate can be multiplied.

Description

technical field [0001] The invention relates to the technical field of data transmission, in particular to a bus structure for interconnecting microcomputers and peripheral devices. Background technique [0002] At present, there are many buses used to connect microcomputers and peripherals. The most common parallel buses of microcomputers include data bus, address bus and control bus (read, write, enable, chip select, direction indication, valid address, etc.); Row bus includes I 2 C, SPI, USB, SATA, etc. [0003] Among them, I 2 The C (Inter-Integrated Circuit, two-wire interconnection bus between integrated circuits) bus is a common bus used to connect CPUs and peripheral devices. 2 The C bus realizes data transmission through two connecting wires, and the circuit is the simplest; multiple peripherals can be connected at the same time, and peripheral access is distinguished according to different addresses; but the I2C bus in the prior art can only transmit data throug...

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Problems solved by technology

[0003] Among them, I 2 The C (Inter-Integrated Circuit, two-wire interconnection bus between integrated circuits) bus is a common bus used to connect CPUs and peripheral devices. 2 The C bus realizes data transmission through two connecting wires, and the circuit is the simplest; multiple peripherals can be connected at the same time, and peripheral access is distinguished according to different addresses; but the I2C bus in the prior art can only transmit data through a single line, and low rate

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