Flash memory controller and control method thereof as well as flash memory storage equipment

Abstract

The invention is applicable to the technical field of solid state storage, and provides a flash memory controller and a control method thereof as well as flash memory storage equipment. The control method of the flash memory controller comprises the following steps: a command generating state machine receives commands from a plurality of command interfaces of the flash memory, translates the commands and then transmits to a core controller, and pre-writes the address of commands completion state information into a buffer register; the core controller executes the commands and a data address state machine provides the data address for the core controller according to the execution dynamic of the core controller; and after the core controller executes the commands, a command recovering state machine inquires the commands completion state information corresponding to the commands from the core controller, and writes the command completion state information into an internal memory according to the address of the buffer register. Therefore, the execution speed of the commands can be increased; the core controller has sufficient commands to realize high-performance data transmission; the performance of the flash memory controller is guaranteed; and the generating and recovering efficiency of the commands is improved.

Description

technical field [0001] The invention relates to the technical field of solid-state storage, in particular to a flash memory controller, a control method thereof, and a flash memory storage device. Background technique [0002] The flash memory controller in the current flash memory controls multiple flash memory particles at the same time, and these flash memory particles share a data and command channel, and the controller realizes the operation of the selected flash memory particle through a chip select signal. In order to achieve the goal of high-speed transmission, the data and command channels of the flash memory particles are required to transmit commands and data uninterruptedly, and the flash memory controller is fully loaded to switch between multiple flash memory particles. Therefore, it is necessary for the flash memory controller to be able to obtain multiple flash memories Granular commands, and can switch between commands flexibly. [0003] figure 1 It is a s...

AI Technical Summary

Problems solved by technology

The core controller needs multiple commands to schedule to achieve high performance. Therefore, on the command interface, multiple command controllers are required, which increases the overhead of hardware resources and increases the area and power consumption of the chip.

At the same time, each command controller needs to wait for the command to complete and recycle the completion information after sending out the command. The time for each command controller to maintain control of a command is too long, and the command switching time is long, which reduces the speed of command execution.

In addition, the command controller needs to send the command to the core controller, and also needs to send the address of the data operated by the command to the core controller. If the data comes from multiple addresses or the data is to be distributed to multiple addresses, for a command , the command controller needs to provide multiple data addresses to the core controller, and due to the limited cache address space of the core controller, it may cause the command controller state machine to stop in a certain state, reducing the speed of command execution

[0004] In summary, the existing flash memory controller obviously has inconvenience and defects in actual use, so it is necessary to improve

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