Split gate semiconductor device with curved gate oxide profile

Abstract

A split gate semiconductor device includes a trench gate having a first electrode region and a second electrode region that are separated from each other by a gate oxide layer and an adjacent dielectric layer. The boundary of the gate oxide layer and the dielectric layer is curved to avoid a sharp corner where the gate oxide layer meets the sidewalls of the trench.

Description

technical field [0001] Embodiments according to the present invention generally pertain to semiconductor devices. Background technique [0002] To save power, it is important to reduce power loss in transistors. In metal-oxide-semiconductor field-effect transistor (MOSFET) devices, and especially in the MOSFET class known as power MOSFETs, power loss can be reduced by reducing the drain-to-source on-resistance (Rdson) of the device. [0003] Split-gate power MOSFETs, also known as shielded-gate trench MOSFETs, take advantage of larger doping concentrations in the epitaxial layer to reduce Rdson. A split-gate power MOSFET incorporates a trenched gate comprising a first electrode (e.g. polysilicon, or polysilicon-1) connected to a second electrode (e.g. , polysilicon, or polysilicon-2) separately. Properly forming the isolation layer can be challenging from a manufacturing standpoint. [0004] In one conventional fabrication process, a spacer layer is grown on the exposed ...

AI Technical Summary

Problems solved by technology

However, achieving consistent etch rates for dielectrics and oxides can be difficult

Differences in etch rate can affect

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