Method for testing small delay defects based on normalization delay probability distribution

A technology of delay probability and defect testing, which is applied in the direction of electronic circuit testing, etc., can solve problems such as test vector omission, small delay defect test effectiveness impact, etc., to achieve the effect of reducing generation time and improving effectiveness

Inactive Publication Date: 2012-08-01
PEKING UNIV
View PDF4 Cites 5 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The disadvantage is that this method is easy to miss the test vectors with high sensitization probability and small number of sensitization; the test vectors selected in this way will be greatly affected in the effectiveness of small delay defect testing

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method for testing small delay defects based on normalization delay probability distribution
  • Method for testing small delay defects based on normalization delay probability distribution
  • Method for testing small delay defects based on normalization delay probability distribution

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0013] The small delay defect testing method based on the normalized delay probability distribution provided by the present invention will be described in detail below in conjunction with the accompanying drawings, but this does not constitute a limitation to the present invention.

[0014] The present invention is based on the small delay defect testing method of normalized delay probability distribution, and its steps include:

[0015] Phase 1: Establishment of standard unit delay probability distribution matrix

[0016] Step1: Synthesize the circuit under test (DUT) with the Design Compiler tool, and extract the driver and load information of the standard unit;

[0017] Step2: According to the design specifications, use the Specter tool to build a standard cell with drive and load properties (including all standard cells required for Design Compiler synthesis), and set the process fluctuation range and process matching characteristics, and do 200 times of Monte Carlo of the...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses a method for testing small delay defects based on normalization delay probability distribution. The method comprises the following three steps of: N-detect automatic test pattern generation (ATPG), normalization delay probability calculation and test pattern selection, and Top-off ATPG. The N-detect test pattern source of the conventional ATPG tool is used, the problems of process fluctuation, process mismatching and the like are solved, test patterns with the maximum normalization probability value are selected to form a new test pattern set for detecting the small delay defects, and the test effectiveness of the small delay defects caused by process fluctuation, process mismatching and the like is improved. Compared with the prior art, the method has the advantages that the scale of the test patterns can be reduced, and the test effectiveness of the small delay defects can be improved.

Description

technical field [0001] The invention relates to a small delay defect testing method, in particular to a small delay defect test method based on normalized delay probability distribution. Background technique [0002] In modern complex integrated circuit design, the increasing circuit scale leads to a single test model often cannot guarantee sufficient fault coverage; therefore, a mixture of various types of test methods is required, including fixed fault testing, IDDQ, delay testing Wait. With the increase of circuit speed, the proportion of the entire test fault set covered by the delay test is increasing, and the delay test has become an important process in the current test process. With the development of technology, especially below 45nm, process fluctuations, crosstalk, power supply noise distribution, abnormal short circuit and open circuit, etc. will introduce small delay defects on a large scale. These small delay defects will not occur in low frequency circuits. ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): G01R31/28
Inventor 冯建华林志钦
Owner PEKING UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products