Erasing method for flash memory

A flash memory, over-erasing technology, applied in static memory, read-only memory, information storage, etc., can solve problems such as affecting erasure verification, wasting time, etc., and achieve the effect of shortening erasing time

Inactive Publication Date: 2012-07-04
SHANGHAI FUDAN MICROELECTRONICS GROUP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] There is a problem in the traditional flash memory technology: due to the influence of process deviation, there are some defective cells, and the fast cells (fast bits) will enter the over-erase state (over-erase) in advance before other cells are erased. The existence of erased units will affect the erase verification, so that there may be under-erase on the same bit line
This method solves the possible situation of under-erased cells, but the disadvantage of this method is that an erase verification is required after each over-erase operation
Time is wasted since erase verification is performed on a cell-by-cell basis

Method used

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  • Erasing method for flash memory
  • Erasing method for flash memory
  • Erasing method for flash memory

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Embodiment Construction

[0030] based on the following Figure 4 , specify the preferred embodiment of the present invention:

[0031] Such as Figure 4 Shown is a flow chart of a method for erasing a flash memory provided by the present invention, and the method for erasing a flash memory includes the following steps:

[0032] Step 1. Pre-program verification. If any cell is in the erased state, perform pre-programming on the cell.

[0033] Pre-programming is pre-programming for each unit in a sector (sector) or block (block).

[0034] Step 2. Clear the erase flag bit.

[0035] Step 3. Perform erasure verification internally. If the verification fails, go to step 4. If the verification passes, go to step 5;

[0036] Step 4. Perform an erase operation on the sector or block in the under-erased state, set the erase flag to 1, and jump to step 3.

[0037] Step 5. Clear the over-erased flag bit.

[0038] Step 6, judging whether the erasing flag is zero, if yes, then jump to step 10, if not, then ju...

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PUM

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Abstract

The invention relates to an erasing method for a flash memory. The method comprises the following three operation steps: pre-programmed checking, i.e. pre-programming; erase checking, i.e. erasing; and over-erase checking, i.e. over-erase correction. In the method, two state zone bits comprising an erase zone bit and an over-erase zone bit are adopted; an erase and over-erase loop is adopted; and when the cycle index of the loop exceeds preset times, the erasing operation is stepped out. According to the invention, the erasing time is shortened.

Description

technical field [0001] The invention relates to an erasing method for a flash memory. Background technique [0002] In the flash memory with floating gate structure, there is a layer of floating gate medium in the control gate and tunnel oxide layer of the storage unit, which can store charges, so that binary numbers 0 and 1 can be stored. Adding different voltage combinations to the control gate, drain, source and substrate of the memory cell can program a single byte, erase and program back a sector or block, and read a single byte. operation and verification operation. [0003] The cells of the flash memory are connected as an array in the structure of rows and columns, the control gates of the array are connected in the form of rows (word lines), the sources are connected in the form of columns (bit lines), and the lining of each sector or block The bottoms are connected together, and this form of array distribution is called a NOR-type flash memory structure. figure ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/14
Inventor 楼冰泳肖磊廖少武
Owner SHANGHAI FUDAN MICROELECTRONICS GROUP
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