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Testing method for circuit board testing system

A test system and working method technology, applied in the direction of electronic circuit testing, etc., can solve the problems of limiting the number of test nodes, slow detection speed, etc., to achieve the effect of improving self-test and detection, good scalability, and a large number of test nodes

Inactive Publication Date: 2013-12-18
东莞市至高机械科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the existing design, the triode switch array is controlled by relays, which severely limits the number of test nodes and the detection speed is slow

Method used

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  • Testing method for circuit board testing system
  • Testing method for circuit board testing system
  • Testing method for circuit board testing system

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0034] Such as figure 1 , a contact circuit board testing system, comprising: a computer interface M0, the FPGA circuit in the triode switch array control circuit is connected to the computer interface M0; the output end of the FPGA circuit is connected to the triode switch array; The triode switch array includes at least two groups of paired transistor circuits, the paired transistor circuit includes a PNP type and an NPN type transistor, the collectors of the PNP type and NPN type transistors are connected, and each PNP type transistor in the triode array circuit The emitters of the transistors are connected to form the first common point GND1, and the emitters of the NPN transistors in the transistor array circuit are connected to form the second common point GND2. The terminal connected to the electrodes is the test node J; the two common points of the triode switch array are respectively connected to a controlled current source, and the current generated by the controlled...

Embodiment 2

[0121] Self-test function, used to detect the working condition of the triode switch circuit. Control the base of the triode so that any group of triodes is turned on, and the voltage between the two points AB is:

[0122] u AB =U ecs +U ces = 2U ces (12)

[0123] Among them: U ecs , U ces is the saturated conduction voltage drop of the triode, U ecs =U ces , let U ecs +U ces = 2U ces . Obviously, by detecting the detection voltage U between two points AB AB , you can judge the working condition of the triode.

[0124] To test the functional principle, the base of the triode is controlled by the FPGA, so that the triode is cross-conducted to ensure that the PNP and NPN transistors in each pair of tubes are not turned on at the same time, and the voltage between the two points AB is:

[0125] u AB =(U ecs +U ces )+I x R x = 2U ces +I x R x (13)

[0126] Get R from formula (2) x :

[0127] ...

Embodiment 3

[0136] On the basis of embodiment 1, the detection working method of the contact circuit board testing system of the present embodiment comprises the following steps:

[0137] ① Place the standard circuit board horizontally on the test platform of the contact circuit board test system, so that all the probes connected to the test node J of the triode switch array are in contact with the standard circuit board;

[0138] 2. Control the second FPGA circuit M5 by computer to cut off the NPN transistors in any pair of transistor circuits in the transistor array, and make the rest of the NPN transistors in the transistor switch array fully conduct; and the computer controls the first FPGA The circuit M4 makes the PNP-type transistors in the pair of tube circuits conduct, and the remaining PNP-type transistors in the transistor switch array are all cut off, and the test node J in the pair of tube circuits is set as a test reference point;

[0139] ③ If there is no detection voltage ...

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Abstract

The invention relates to a testing method for a contact circuit board testing system. The testing system comprises a computer interface, a first field programmable gate array (FPGA) circuit, a second FPGA circuit and a triode switch array circuit, wherein the first and second FPGA circuits are connected with the computer interface; the triode switch array circuit is connected with the control signal output ends of the first and second FPGA circuits, and at least comprises two groups of geminate transistor circuits; each geminate transistor circuit comprises a PNP type triode and an NPN type triode; and the collectors of the PNP type triode and the NPN type triode are connected. A great number of test nodes are produced, and the FPGA circuits have high extensibility. An effective reference test node can be quickly found, and a node network based on the effective reference test node can be obtained. Anti-jamming capability is high, and the influence of leakage current or leakage voltage on the volt-ampere relationship of the node network can be avoided.

Description

technical field [0001] The invention relates to a test working method of a contact circuit board test system Background technique [0002] In the modern electronics industry, printed circuit boards have been widely used, and various methods for detecting the quality of circuit boards have emerged due to the urgent needs of the industry. The contact detection of the circuit board can be understood as the computer-controlled automatic online detection ICT (In-CircuitTester). The tested circuit board is fixed on the test platform fixture through a pneumatic mechanism, and n tested Measuring points (usually the number of n is determined by the number of pads or vias on the circuit board), through full contact with the probes connected to the test nodes in the triode switch array and the pads or vias, the triode switch array and Its control circuit is the key to system testing, and the paired circuit composed of PNP and NPN transistors is the most basic unit circuit that constit...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01R31/28
Inventor 徐煜明韩雁徐斐张建兵
Owner 东莞市至高机械科技有限公司
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