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2-phase gain calibration and scaling scheme for switched capacitor sigma-delta modulator

A technology of modulators and capacitors, used in analog conversion, electrical components, code conversion, etc.

Active Publication Date: 2012-04-11
MICROCHIP TECH INC
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0009] However, the need for four steps (stages) per sample limits the sampling rate of the sigma-delta modulator, and / or requires a much faster operating speed of the sigma-delta modulator (faster clocking and higher frequency operating components, whose power usage increase accordingly) to complete the signal conversion in the desired time frame

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  • 2-phase gain calibration and scaling scheme for switched capacitor sigma-delta modulator
  • 2-phase gain calibration and scaling scheme for switched capacitor sigma-delta modulator
  • 2-phase gain calibration and scaling scheme for switched capacitor sigma-delta modulator

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Embodiment Construction

[0026] According to various embodiments, a method that can use only two stages per sample instead of four with less power consumption (due to less stringent requirements on the bandwidth of the amplifier present in the modulator) can be achieved by Sigma-Delta modulator while maintaining very low gain error in the ppm range: The DAC signal and the input signal are sampled simultaneously and in parallel on different sets of capacitors in the modulator's front-end stage, and using a defined algorithm at each These capacitors are rotated while sampling to average the mismatch errors.

[0027] Simultaneous parallel sampling of the DAC signal and the input signal enables a reduction from four stages to two, and the rotation algorithm ensures proper gain error cancellation after a certain number of samples through integration in the modulator loop.

[0028] According to the teachings of the present invention, rotating the capacitor at each sample means assigning different sets of ca...

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Abstract

A sigma-delta modulator may have a plurality of capacitor pairs, a plurality of switches to couple any pair of capacitors from the plurality of capacitor pairs selectively to an input signal or a reference signal, and a control unit operable to control sampling through the switches to perform a charge transfer in two phases wherein any pair of capacitors can be selected to be assigned to the input signal or the reference signal, and wherein after a plurality of charge transfers a gain error cancellation is performed by rotating the capacitor pairs cyclically such that after a rotation cycle, each capacitor pair has been assigned a first predetermined number of times to the input signal, and has also been assigned a second predetermined number of times to the reference signal.

Description

[0001] Related Application Cross Reference [0002] This application claims to file an application on July 16, 2009, titled "(TWO-PHASE CALIBRATION AND SCALING METHOD, SYSTEM AND APPARATUS FOR SWITCHED-CAPACITOR SIGMA-DELTA MODULATOR) for two-stage switching capacitor sigma-delta modulator Calibration and Scaling Methods, Systems, and Apparatus," U.S. Provisional Application No. 61 / 226,049, which is hereby incorporated by reference in its entirety. technical field [0003] The present invention relates to analog-to-digital converters, in particular to sigma-delta modulators, and more particularly to a method for reducing, without penalty on conversion time, the How to affect the resulting gain error. Background technique [0004] Today, analog-to-digital converters (ADCs) are widely used in electronic devices for consumer applications, industrial applications, and the like. Typically, an analog-to-digital converter includes circuitry for receiving an analog input signal a...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M3/00H03M1/06
CPCH03M3/464H03M3/422H03M3/456H03M1/0663H03M1/0665
Inventor 菲利普·德瓦尔文森特·奎奎姆普瓦
Owner MICROCHIP TECH INC
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