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SRAM type fpga single event effect test system and method

A single event effect and test system technology, which is applied in the field of SRAM-type FPGA single event effect test system, can solve problems such as complex process, high professional ability, and undisclosed issues, and achieve simple operation, good real-time performance, and high accuracy.

Active Publication Date: 2015-08-05
CHINA ACADEMY OF SPACE TECHNOLOGY
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  • Abstract
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  • Application Information

AI Technical Summary

Problems solved by technology

The fault injection system and method of Beijing Times Minxin Technology Co., Ltd. needs to make faulty unit modules, modify the gate-level HDL code of the target circuit, and generate faulty circuits. The operation requires high professional ability and the process is complicated
[0006] Foreign reports engaged in single event effect test research mainly include the American XILINX company and the European SAAB laboratory. The software and IP core can comprehensively complete the single event effect detection and fault injection of the internal resources of the FPGA under test, but the internal resource detection technology of the FPGA used in the test has not been disclosed, and a large number of technologies cannot be obtained in China, and the detection method is to use The FPGA under test is configured as a fixed logic function, and the external computer uses special software to detect the general internal resources of the device. The detection scheme does not target the specific application logic of the device; the European SAAB laboratory also cooperates with Xilinx, and adopts a specially designed detection Board, host computer detection software and IP core for single event effect detection and fault injection, the technical details of the detection are not disclosed and cannot be obtained domestically

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  • SRAM type fpga single event effect test system and method
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  • SRAM type fpga single event effect test system and method

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Embodiment Construction

[0059] like figure 1 As shown, it is a composition block diagram of the SRAM type FPGA single event effect test system of the present invention, including a single-chip processor, RS232 interface circuit, USB interface circuit, test FPGA and storage unit. The present invention is in concrete implementation, and single-chip processor selects the C8051F020 of Silicon Laboratories Company for use, and test FPGA selects the Cyclone III series FPGAEP3C120F780C7 of Altera Company for use, and the Virtex series FPGAXQV300-4CB228 of Xilinx Company for use for tested FPGA, and the serial configuration port of this FPGA is JTAG port, and the parallel configuration port is SelectMAP port.

[0060] Firstly, carry out the corresponding initialization operation, and after power-on, the single-chip processor and test FPGA automatically complete the program loading and initialization. Test the FPGA to cyclically detect the signal input of the USB interface. If the configuration program downl...

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Abstract

The invention provides a test system and method for a single event effect of an SRAM (System Random Access Memory) type FPGA (Field Programmable Gate Array). The test system comprises a single chip microcomputer processor, an RS232 interface circuit, a USB (Universal Serial Bus) interface circuit, a test FPGA and a storage unit. The test system and method can be used for fault injection tests of a configuration memory and a BRAM (Battery Random Access Memory) of the SRAM type FPGA, and single event function interrupting detection, single event locking detection and single event turning detection including single event turning detection for a configuration storage region, the BRAM and a trigger of the SRAM type FPGA are realized. The invention has the advantages of simplicity in operation, entirety in detection, high accuracy, good real-time property and strong universality.

Description

technical field [0001] The invention relates to a SRAM type FPGA single event effect test system and method. Background technique [0002] FPGA is a new type of reconfigurable device. The use of FPGA in satellite development can speed up the development progress of satellites, shorten the development cycle, and improve the performance of satellites. The satellite works in the space radiation environment, and the radiation effect will cause the FPGA performance to degrade or even fail, and the FPGA performance degradation caused by the single event radiation effect is particularly obvious. Before the satellite uses FPGA, single event effect detection must be carried out on FPGA, and the sensitivity of single event effect can be evaluated through the test, so as to provide a basis for the model selection of devices and systems for radiation-resistant hardening design. [0003] Domestic single-event experiments are mainly concentrated on various traditional fixed-function devi...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/00
Inventor 刘迎辉张大宇于庆奎唐民宁永成孟猛张海明李鹏伟罗磊
Owner CHINA ACADEMY OF SPACE TECHNOLOGY
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