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Method and device for managing multilayer unit flash memory, and storage equipment

A multi-layer cell and management method technology, applied in information storage, static memory, digital memory information, etc., can solve the problem of not fully utilizing the multi-layer cell flash memory storage structure, achieve optimal performance, improve read and write speed and The effect of stability

Inactive Publication Date: 2011-10-12
SHENZHEN NETCOM ELECTRONICS CO LTD
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  • Summary
  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The purpose of the embodiments of the present invention is to provide a management method for multi-level cell flash memory, which aims to solve the problem that the prior art does not make full use of the characteristics of the storage structure of multi-level cell flash memory to achieve the optimal performance of multi-level cell flash memory

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  • Method and device for managing multilayer unit flash memory, and storage equipment
  • Method and device for managing multilayer unit flash memory, and storage equipment
  • Method and device for managing multilayer unit flash memory, and storage equipment

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Embodiment Construction

[0019] In order to make the objectives, technical solutions and advantages of the present invention clearer, the following further describes the present invention in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, but not to limit the present invention.

[0020] In the embodiment of the present invention, by calculating the storage address of the least significant page in the multi-level cell flash memory, important data and frequently written data are written into the storage address corresponding to the least significant page, making full use of the multi-level cell flash memory. characteristic.

[0021] figure 1 The implementation process of the multi-level cell flash memory management method provided by the embodiment of the present invention is shown, and the details are as follows:

[0022] In step S101, the storage address of the least sig...

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Abstract

The invention is applicable to the technical field of flash memories and provides a method and a device for managing a multilayer unit flash memory, and storage equipment. The method comprises the following steps of: calculating a storage address of the lowest effective bit page in the multilayer unit flash memory; and writing important data and frequently written data into the storage address corresponding to the lowest effective bit page. In the embodiment of the invention, the important data and the frequently written data are written into the storage address corresponding to the lowest effective bit page, the characteristic of the multilayer unit flash memory is used fully and the optimal performance of the multilayer unit flash memory is realized, so the reading-writing speed of the multilayer unit flash memory is increased and the stability of the multilayer unit flash memory is enhanced.

Description

Technical field [0001] The invention belongs to the technical field of flash memory, and in particular relates to a management method, device and storage device of a multi-layer unit flash memory. Background technique [0002] Flash memory can be divided into single-level cell flash memory according to its internal structure, each cell (cell) stores 1 bit of information; multi-layer cell flash memory, each cell (cell) stores at least 2 bits of information , Among them, the multi-layer cell flash memory includes 2bit / cell, 3bit / cell and more bit flash memory in the future. [0003] Single-level cell flash memory writes data by applying a voltage to the charge of the floating gate, and the stored charge is eliminated through the source. In this way, one bit of information is stored (1 represents elimination, 0 represents write). The multi-level cell flash memory uses different levels of charge in the floating gate, so it can store multiple bits of information in a single transistor,...

Claims

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Application Information

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IPC IPC(8): G06F12/06G11C7/10
Inventor 李志雄邓恩华李中政
Owner SHENZHEN NETCOM ELECTRONICS CO LTD
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