Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

FPGA-based traffic signal control machine for intersection queue length image detection

A technology for queuing length and image detection, which is applied in traffic signal control, traffic flow detection, etc., can solve the problems of long time, poor real-time performance, and low cost, and achieve the effect of strong scalability and good real-time performance

Inactive Publication Date: 2011-05-04
XIAN FEISIDA AUTOMATION ENG
View PDF2 Cites 40 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This implementation method is low in cost and high in reliability, but the real-time performance is relatively poor
The FPGA chip has the characteristics of fast hardware logic processing speed and can control the acquisition of images at high speed. However, it takes relatively more time for DSP to realize real-time processing of digital images. The mismatch between the two operating speeds has caused the processing of the entire system to low efficiency
In addition, the DSP chip also needs to realize the management of video acquisition, the processing of digital images and the control of RAM reading and writing, which leads to the fact that such systems are far from meeting the actual real-time requirements of the project.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • FPGA-based traffic signal control machine for intersection queue length image detection
  • FPGA-based traffic signal control machine for intersection queue length image detection
  • FPGA-based traffic signal control machine for intersection queue length image detection

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0019] The video acquisition unit adopts CCD, which can collect the live image and send it to the A / D conversion chip for further processing. The A / D chip adopts the 7111 chip of PHILIPS Company. The 7111 chip has 4 analog channels. It collects 4 channels of image signals in time-sharing and processes them in time-sharing. The conversion mode of 7111 can be selected by programming. 2 C bus for programming, complete the initialization of 7111, the output format of the signal is also determined by I 2 The C bus is used for control, using the 4:2:2 format of CCIR601. In this way, the on-site image is converted from analog data to digital data, which can be sent to the FPGA chip for corresponding processing through the buffer.

[0020] The FPGA adopts the EP1C12 chip in the Cyclone series FPGA of Altera Company of the United States. The chip has a density of 12060 LE units (each LE includes a LUT, a flip-flop and related logic, which is the most basic structure of chip implement...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to field programmable gate array (FPGA)-based intersection queue length image detection and traffic signal control implementation, and belongs to signal processing technology, communication technology and traffic signal control technology. A digital image interested region is detected by using an FPGA chip on the basis of the conventional signal machine, and the queue length at a traffic intersection is extracted and a signal machine mainboard is communicated with an ARM7 processor so as to control a traffic signal lamp. The invention is characterized in that: an image processing algorithm circuit constructed by FPGA hardware logic analyzes and processes the acquired image signal, calculates the split green ratio according to the result and makes an image processing algorithm become hardware without a computer or a digital signal processor (DSP) and other core processors.

Description

technical field [0001] The invention relates to an FPGA-based intersection queuing length image detection and traffic signal control realization, which belongs to signal processing technology, communication technology and traffic signal control technology. On the basis of the existing signal machine, the FPGA chip is used to detect the area of ​​interest in the digital image, and the length of the fleet at the traffic intersection is extracted, and the ARM7 processor communicates with the signal machine main board to realize the control of the traffic signal light. Background technique [0002] Traffic signal control is the use of traffic signals to command and guide vehicles and pedestrians running on the road. Traffic signal automatic control is an important part of traffic control and an effective means of scientific traffic management. The controller, which is mainly used for the control of signal lights at intersections, can not only realize the control independently, b...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): G08G1/07G08G1/04
Inventor 史忠科王闯贺莹
Owner XIAN FEISIDA AUTOMATION ENG
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products