Method and device for loading field programmable gate array bit file

A bit file, gate array technology, applied in the field of field programmable gate array bit file download, can solve problems such as FPGA configuration failure

Inactive Publication Date: 2015-05-20
ZTE CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The present invention is proposed for the problem that FPGA configuration failure often occurs due to abnormal conditions in PROM upgrades. For this reason, the main purpose of the present invention is to provide a method and device for downloading programmable gate array bit files to solve the above problems

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  • Method and device for loading field programmable gate array bit file
  • Method and device for loading field programmable gate array bit file

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Embodiment Construction

[0026] Functional Overview

[0027] Considering that FPGA configuration failure often occurs due to abnormal conditions during PROM upgrade, the embodiment of the present invention provides a method and device for downloading a programmable gate array bit file. The device includes: main PROM and backup PROM, used to store logic configuration files of FPGA; switch chip, connected with FPGA, main PROM and backup PROM, used to connect FPGA to main PROM, or connect FPGA to backup The PROM is switched on.

[0028] It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and examples.

[0029] According to an embodiment of the present invention, a device for downloading a programmable gate array bit file is provided.

[0030] figure 1 is a schematic diagram of a device for d...

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Abstract

The invention provides a method and device for loading a programmable gate array bit file. The device comprises a primary programmable read-only memory (PROM), a standby PROM and a switch chip, wherein the primary PROM and the standby PROM are used for memorizing a logic configuration file of a field programmable gate array (FPGA); and the switch chip is connected with the FPGA, the primary PROM and the standby PROM for communizing the FPGA with the primary PROM or communicating the FPGA with the standby PROM. The method solves the problem that the configuration of the FPGA is usually failed due to the unusual condition when the PROM is upgraded, thereby archiving the effect that the upgrade of the FPGA is safer and more reliable.

Description

technical field [0001] The invention relates to the communication field, in particular to a method and a device for downloading a field programmable gate array bit file. Background technique [0002] With the development of embedded technology in the field of communication, Field Programmable Gate Array (Field Programmable Gate Array, referred to as FPGA) as a logic control circuit device, because of its static reprogrammable or online dynamic reconfiguration, is its It has been widely used in more and more fields. [0003] The FPGA will lose its function after power off, so it is necessary to add an external storage unit to save the logic program (bit file) of the FPGA in the peripheral circuit of the FPGA, and store the logic program from the storage unit when the system is powered on or when there is a specific need. Download to FPGA. Usually, there are many ways to download the logic program of the FPGA, such as using a dedicated PROM chip provided by the FPGA manufact...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/445G06F13/38
Inventor 张天镜
Owner ZTE CORP
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