Region-based photoelectric double-layer network-on-a-chip and routing method

Abstract

The invention discloses a region-based photoelectric double-layer network-on-a-chip and a routing method for solving the problem of serious network congestion of the traditional network. The system comprises 64 processor cores, 8 electrical crossing matrix modules, 8 8-port optical routers and 8 16-port optical routers; the 64 processor cores are divided into 8 regions; in each region, one electrical crossing matrix module mutually connect the 8 processor cores uniformly; and among the regions, the electrical crossing matrix modules, the 8-port optical routers and the 16-port optical routers connects all the regions into an integrated network. When two communication parties are in the same region, data information can be exchanged directly through the electrical crossing matrix modules; and when the two communication parties are not in different regions, the data information can be exchanged among regions through the electrical crossing matrix modules, the 8-port optical routers and the 16-port optical routers. The invention can improve the resource utilization rate and can be used for the interconnection among cores on a chip and optimizing data transmission among the processor cores.

Description

technical field [0001] The invention belongs to the technical field of on-chip communication and relates to a network system, in particular to an area-based photoelectric double-layer on-chip network system, which can be used for interconnection between on-chip cores and optimizes data transmission between processor cores. Background technique [0002] With the rapid development of semiconductor technology, a single chip can integrate more and more complex functions. The scale of the system chip (System on Chip, SoC) is getting bigger and bigger, and it is developing towards the direction of multi-core and heterogeneous. As a new design method, Network on Chip (NoC) can solve the bottlenecks of energy consumption, area, and bandwidth caused by the bus-based structure, and meet the requirements of scalability, energy consumption, and area for the development of large-scale integrated circuits. , reusability, quality of service and other requirements, it not only has good sca...

AI Technical Summary

Problems solved by technology

At present, some of the existing on-chip optical routers are blocked, which affects the network performance; some use multiple wavelengths to achieve the purpose of non-blocking, the wavelength utilization rate is very low, and the implementation cost is increased.

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