Performance counter for microcode instruction execution and counting method
A technology of instruction execution and counting device, which is applied in the field of counting the execution times of microcode instructions, and can solve the problems of microcode difficulty, no function provided, microcode obtaining observation, etc.
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[0032] refer to figure 1 , shows a block diagram of a microprocessor 100 according to the present invention. In response to the microprocessor 100 receiving user program instructions, the microcode memory 104 stores a plurality of microcode instructions 108 provided by it to a plurality of execution units 112. In addition, although not shown in figure 1 Among them, microcode instructions from other sources, such as microcode instructions from an instruction translator or an instruction cache (not shown) of the microprocessor 100, are also provided to the plurality of execution units 112 for execution. In an embodiment of the present invention, the plurality of execution units 112 execute microcode instructions out of order.
[0033] The microprocessor 100 also includes a reorder buffer 122 coupled to the plurality of execution units 112. microcode instruction 108) assigns an item (entry) 124 or 126, and when a plurality of microcode instructions 108 are sent to a plurality o...
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