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Direct memory access controller and data transmission method

A memory and controller technology, applied in the field of communication, can solve the problems of limited data auxiliary processing function and slow DMA data transmission speed, and achieve the effect of solving the slow data transmission speed and improving efficiency

Inactive Publication Date: 2010-07-14
SANECHIPS TECH CO LTD
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Problems solved by technology

[0008] Considering the problems of slow DMA data transfer speed and limited data auxiliary processing functions in the related art, the present invention is proposed. For this reason, the main purpose of the present invention is to provide an improved direct memory access controller and data transfer method , to solve at least one of the above-mentioned problems in related technologies

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  • Direct memory access controller and data transmission method
  • Direct memory access controller and data transmission method

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example

[0074] Based on the above description, Figure 4 Shows the specific implementation structure of the DMAC according to the device embodiment of the present invention, through which the DMAC can realize the following image 3 data transfer method shown.

[0075] Such as Figure 4 As shown, the DMAC includes a logical selection channel and a physical channel.

[0076] where the logic selects the channel (corresponding to figure 2 The configurator 2 in ) includes a logical channel group 301 (including 16 logical channels, that is, logical channel 1, logical channel 2, ..., logical channel 16), a channel arbitration module 302, and a logical channel priority Level module 303, logical channel group 301, channel arbitration module 302, and logical channel priority module 303 are connected to each other; wherein, each logical channel includes a register group responsible for transmission and control (not in Figure 4 shown in ), these logical channels are configured through an ad...

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Abstract

The invention discloses a DMAC and a data transmission method, wherein the DMAC comprises a reader, a buffer and an emitter, wherein the reader is used for responding transmission requests from outside, obtaining source addresses corresponding to the transmission requests, and reading data from equipment corresponding to the source addresses, wherein the data comprises a plurality of data blocks, the buffer comprises a first buffer and a second buffer which are used for alternately storing a plurality of data blocks, and the emitter is used for sequentially obtaining and sending a plurality of data blocks from a buffer module according to the alternate sequence. According to the invention, through the arrangement of the first buffer and the second buffer between the reader and the emitter of the DMAC, data can be alternately stored into the first buffer and the second buffer, in addition, the parallel data reading and sending operation can be realized, and the data transmission efficiency can be improved, so the problem of slow DMA data transmission speed in the relevant technology can be solved.

Description

technical field [0001] The present invention relates to the communication field, in particular to a direct memory access controller and a data transmission method. Background technique [0002] At present, the system-on-chip (SoC) technology is mainly used in the design of large-scale complex control chips. This technology connects the controller, memory, and various special processing devices into a cooperative overall system through the interconnection bus structure. Thus forming a specific chip with complex functions. [0003] Direct Memory Access (DMA Controller, DMAC for short) is an essential component in the SoC system, which mainly performs the transmission (or handling) of a certain size of data blocks in the system. ) work, thereby releasing the burden of the controller in the SOC system and improving the overall performance of the SOC system. [0004] The traditional DMAC mostly adopts the principle of serial work, that is, a DMA data transmission operation incl...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/28
Inventor 刘凯
Owner SANECHIPS TECH CO LTD
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