CORDIC algorithm-based capacitive micro-accelerometer signal detection device

Abstract

The invention discloses a CORDIC algorithm-based capacitive micro-accelerometer signal detection device. The device comprises a capacitive micro-accelerometer sensor, a charge amplifying module, an analogue-to-digital converter, a field programmable gate array, a first digital-to-analogue converter, an analogue bandpass filter and a second digital-to-analogue converter, wherein the capacitive micro-accelerometer sensor, the charge amplifying module, the analogue-to-digital converter, the field programmable gate array, the first digital-to-analogue converter and the analogue bandpass filter are orderly connected; and the field programmable gate array is also connected with the second digital-to-analogue converter. The CORDIC algorithm-based capacitive micro-accelerometer signal detection device can regulate the phase, the frequency, the amplitude and the like of carrier signals in real time so as to achieve good flexibility, adopts high-frequency carrier modulation to suppress low-frequency noise, such as l / f noise and the like, adopts a digital modulation mode to overcome the defect that an analogue system is easy to be influenced by environmental factors, such as temperature and the like, and can control algorithm accuracy through iteration times and a data word size.

Description

technical field [0001] The invention relates to a capacitive micro-accelerometer signal detection device based on a CORDIC algorithm. Background technique [0002] Capacitive Microaccelerometer (Capacitive Microaccelerometer) is a high-precision inertial sensor device that detects acceleration signals based on Newton's second law and uses differential structure capacitance changes. Since the output of the capacitive micro-accelerometer sensor is an extremely weak capacitance change signal, the signal conversion and detection technology in the system has a very important position. What is used here is to use the charge amplification module circuit to realize the conversion of capacitance / voltage signal, and to use Field Programmable Gate Array chip (Field Programmable Gate Array, FPGA) to realize the generation and modulation and demodulation of high frequency carrier. Usually, direct digital frequency synthesis (Direct Digital Frequency Synthesis, DDS) technology is used to...

AI Technical Summary

Problems solved by technology

Usually, direct digital frequency synthesis (Direct Digital Frequency Synthesis, DDS) technology is used to generate the carrier signal. The commonly used method is the memory (Read-Only Memory, ROM) table look-up method. This structure has a disadvantage, that is, the capacity and precision of the ROM table. Requirements are exponentially related, and large-capacity ROM means high power consumption, high cost and low stability of the system

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