Clock domain crossing timing simulation system and method

Abstract

The invention discloses clock domain crossing timing simulation system and method. The clock domain crossing timing simulation system comprises a finder, a modifier, and a simulator. In the clock domain crossing timing simulation method, the finder confirms that all clock domain crossing registers on a hierarchical path list can be found and obtained in timing annotation files; then positions of the clock domain crossing registers are found in the timing annotation files and are output to the modifier; the modifier receives the positions of the clock domain crossing registers in the timing annotation files, which are sent by the finder, eliminates timing annotation information of the clock domain crossing registers in the timing annotation files, and outputs the processed timing annotation files to the simulator; and the simulator is used for simulating timing information annotation back net lists in the timing annotation files. Through processing delayed annotation information, the invention achieves that indefinite states occurring in a cross clock domain part in simulation are eliminated, enables a system with a plurality of clock domains to be capable of timing simulation, andis more capable of reflecting true situations of the plurality of clock domain systems compared with other methods.

Description

technical field [0001] The invention belongs to the technical field of computers, and relates to a timing simulation system, in particular to a timing simulation system crossing clock domains; in addition, the invention also relates to a simulation method of the timing simulation system crossing clock domains. Background technique [0002] Digital electronic systems such as computer systems often need to use multiple different clock domains. A synchronizer is used at the interface of different clock domains to connect signals from two different clock domains. The registers used in the synchronization process of signals in different clock domains will enter a metastable state because the setup time or hold time is not satisfied. In reality The synchronizer has the function of eliminating this metastable state, but in the timing simulation, this metastable state will be transferred to the subsequent registers, so that the simulation cannot continue to proceed correctly, so it ...

AI Technical Summary

Problems solved by technology

A synchronizer is used at the interface of different clock domains to connect signals from two different clock domains. The registers used in the synchronization process of signals in different clock domains will enter a metastable state because the setup time or hold time is not satisfied. In reality The synchronizer has the function of eliminating this metastable state, but in the timing simulation, this metastable state will be transferred to the subsequent registers, so that the simulation cannot continue to proceed correctly, so it is necessary to propose a cross-clock domain timing simulation device with method

[0003] In the timing simulation of existing cross-clock domain systems, most of them use the same clock to simulate the system to avoid the problem of multiple clock domains. The disadvantage is that it is not conducive to reflecting the real situation of the system

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