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Event processing unit group of multi-core processor conforming to systemC grammar

A technology of event processing and unit group, applied to the architecture with multiple processing units, electrical digital data processing, special data processing applications, etc., can solve the problem of not supporting a process waiting, etc.

Active Publication Date: 2008-12-03
INST OF COMPUTING TECH CHINESE ACAD OF SCI
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Problems solved by technology

[0009] In existing multi-core processors, in order for the processor core of the event processing unit to notify other processing units that may receive an event, the software needs to send event notification packets to the processing units that may receive the event, and does not support a A process is waiting on multiple events at the same time

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  • Event processing unit group of multi-core processor conforming to systemC grammar
  • Event processing unit group of multi-core processor conforming to systemC grammar
  • Event processing unit group of multi-core processor conforming to systemC grammar

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Experimental program
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Embodiment Construction

[0038] A multi-core processor meeting the syntax requirements of SystemC provided by the present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0039] Multi-core processors optimized for SystemC hope to adopt SystemC as a multi-core software development language. SystemC is an extended library of C++. In 1999, companies such as Cadence, Synopsys, and ARM in the EDA industry jointly organized the development of a C++-based EDA language, thus giving birth to SystemC. In 2006, SystemC officially became the IEEE standard, becoming the third natural language after VHDL and Verilog supported by all EDA software.

[0040] SystemC can provide higher design efficiency and a more effective design process, which can help solve the explosive complexity, market pressure, cost rise and other problems faced by the integrated circuit industry.

[0041] The SystemC language itself is an extension of C++. Therefore, althoug...

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Abstract

The invention discloses an event processing unit group of a multicore processor, which satisfies systemC grammar. The event processing unit group comprises various public functions of sc_event and sc_event_queue of the systemC grammar, various forms of wait (ellipsis) function, and a logic circuit for the realization of an SC_THREAD and SC_METHOD sensitive table, and is used for transmitting the signal to activate and suspend the processor and causing the mapping algorithm of a software developing tool to carry out combination to a plurality of the event processing unit groups of different processing units, thus realizing function defined by a plurality of sc_event or sc_event_queue grammar units, the function of the wait (ellipsis) function and the function of the SC_THREAD and SC_METHOD sensitive table. The event processing unit group supports a plurality of events in a single module and supports an event unit trigger event positioned in a processing unit, a plurality of the event units positioned in other processing units receive the notification message.

Description

technical field [0001] The invention relates to a multi-core processor, more specifically, the invention relates to an event processing unit group of a multi-core processor satisfying SystemC syntax. Background technique [0002] In recent years, multi-core processor technology has been booming. The main reasons are as follows: first, design requirements; the cost of silicon is getting lower and lower, and the integration level is getting higher and higher, and the regular structure of multi-core can use more silicon area simply and effectively; second, business Requirements: Multimedia services are becoming more and more complex, requiring platform flexibility and processing performance to be higher and higher, while also requiring power consumption to be kept within the allowable range. Multi-core processors can potentially provide the highest performance-to-power ratio and are available for higher Performance calculation and flexibility; third, time to market (Time to ma...

Claims

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Application Information

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IPC IPC(8): G06F17/50G06F15/80G06F15/163G06F9/46
Inventor 陈曦黄毅刘祥张金龙刘玉东
Owner INST OF COMPUTING TECH CHINESE ACAD OF SCI
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