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Management method and device for sharing internal memory in multi-core system

A multi-core system and shared memory technology, which is applied in the field of shared memory management, can solve problems such as high communication overhead between multi-cores, complicated communication process between multi-cores, and inability to transfer memory between multiple cores, so as to reduce the probability of access conflicts and improve performance Effect

Inactive Publication Date: 2008-08-20
HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0016] The purpose of the embodiment of the present invention is to provide a method and device for managing shared memory in a multi-core system, so as to solve the existing problem that memory cannot be transferred between multi-cores, The multi-core communication process is complicated and the overhead of multi-core communication is large

Method used

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  • Management method and device for sharing internal memory in multi-core system
  • Management method and device for sharing internal memory in multi-core system
  • Management method and device for sharing internal memory in multi-core system

Examples

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Embodiment 1

[0044] Embodiment 1. A schematic diagram of memory sharing provided by this embodiment in which multiple sharing methods coexist is shown in Figure 2. The principle of the coexistence of multiple sharing methods is to divide the memory shared area into several sub-areas, and flexibly set each sub-area Access rights and read and write rights, in order to achieve the purpose of coexistence of multiple sharing methods.

[0045] As shown in Figure 2, according to the CPU application model, the shared memory is divided into several global shared areas and local shared areas. The division of the global shared area and the local shared area is related to the service distribution on each CPU. The global shared area allows all CPUs to access, and the local shared area allows some (one or several) CPUs to access, and the local shared areas cannot access each other.

[0046] As shown in FIG. 2 , the local shared area 1 allows only CPU1 and CPU2 to access, the local shared area m only all...

Embodiment 2

[0060] Embodiment 2. This embodiment provides a diversified design of shared memory types in a multi-core system. According to specific business requirements, the corresponding memory type and the number of memory blocks can be configured, and the appropriate memory can be automatically selected to carry and transmit business data, improving the memory capacity. utilization rate.

[0061] Assuming that there are multiple types of services in the multi-core system, and the data packets of each service have different lengths, among which the maximum data packet length is 1024 bytes, then the shared memory can be configured as 32 bytes, 64 bytes, 128 bytes, 256 bytes, 512 bytes, 1024 bytes and other types, and according to the actual business model, allocate a certain number of memory blocks for each type of memory to form a memory pool. For example, if the number of data packets from 128 bytes to 512 bytes accounts for more than 50% of the total traffic, then allocate more memor...

Embodiment 3

[0066] Embodiment 3, a schematic diagram of a principle of a memory-level multicast technology provided in this embodiment is shown in FIG. 7 . This embodiment proposes a multicast technology at the memory level based on multi-core memory sharing. A certain number of multicast message blocks are stored in the pool, such as 4096. The specific number depends on the number of multicast services. Each multicast message block includes multicast packet address, size field and multicast control field (such as multicast count , multicast lock, etc.), all multicast message blocks refer to the address of the same multicast packet.

[0067] When data packets are multicast between multiple cores, the multicast data packets are not copied, but the information of the multicast data packets (including the address and its size) is transmitted to the destination through the message channel, and the destination CPU according to the information of the multicast data packets Get multicast packet...

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Abstract

The invention provides a management method and device for shared memory in a multi-core system. The method mainly comprises: configuring global shared memory and local shared memory in the multi-core system; all central processor units (CPU) in the multi-core system are capable of accessing the global shared memory and part of CPUs in the multi-core system are capable of accessing the local shared memory. The device mainly comprises: the global shared memory configuration module and the local shared memory configuration module. Free transfer of shared memory between CPUs can be accomplished by the invention and agile configuration of the shared memory on each CPU is supported, which accomplishes co-existence of various memory-sharing ways so as to simplify process of communication among multi-cores, greatly reduce probability of shared memory accessing conflict and is beneficial to improve performance of the multi-core system.

Description

technical field [0001] The invention relates to the field of computer applications, in particular to a method and device for managing shared memory in a multi-core system. Background technique [0002] In today's electronics, communications, and IT industries, whether it is an embedded system or a general-purpose computer system, the limitations of single-core processors are becoming increasingly obvious, and they are increasingly unable to meet users' requirements for high performance and large capacity. As a result, multi-core (that is, multi-CPU (Central Processing Unit, central processing unit)) technology has emerged at the historic moment, and continues to develop and mature, and its application range in the market is rapidly expanding. It has become an inevitable trend that multi-core technology will replace traditional single-core technology. . [0003] Multi-core memory management technology is a key technology in multi-core technology. The entire system architectu...

Claims

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Application Information

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IPC IPC(8): G06F15/177G06F15/167G06F12/02
CPCG06F15/7842
Inventor 陈定春
Owner HUAWEI TECH CO LTD
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