Low pressure difference linearity voltage stabilizer for enhancing performance by amplifier embedded compensation network

Abstract

A low voltage differential linear regulator utilizes an embedded compensation network in an amplifier to improve performance, which embeds a compensation network composed of resistances and capacitances into an amplifier to increase one or a plurality of pole-zero pairs with their pole-zero frequency lower than pole frequency in a transfer function of a feedback loop without changing static operating point of the amplifier and increasing static current. Frequency of the pole-zero pairs can be accurately confirmed to enhance stability of the feedback loop of the low voltage differential linear regulator, expand loop unit gain bandwidth and increase phase margin and DC and low-frequency gain of the loop, thus enhancing performance of the low voltage differential linear regulator.

Description

technical field [0001] The invention relates to a low-dropout linear voltage stabilizer, in particular to a low-dropout linear voltage stabilizer which utilizes a built-in compensation network of an amplifier to improve performance. Background technique [0002] Closed-loop negative feedback systems are commonly used in linear integrated circuits. For example, in a low-dropout voltage regulator (LDO, Low-Dropout Voltage Regulator), it is necessary to use a feedback loop to obtain a stable output voltage. According to the Nyquist criterion, in order to ensure the stability of the closed-loop system, the phase shift of the loop at unity gain should be less than 180 degrees. However, in actual circuit design, it is generally required that the phase shift of the loop at unity gain is less than 135 degrees (that is, the phase margin is greater than 45 degrees). In most cases, control of the phase shift is achieved by including a compensation circuit in the feedback loop. [00...

AI Technical Summary

Problems solved by technology

A lower UGF not only causes the loop to respond slower, but also limits the loop's DC gain

If the LDO's loop gain is low, its output voltage accuracy will be reduced accordingly

[0012] 2. Due to the limitations of working conditions, manufacturing process changes and model accuracy, the positions of poles P3 and P4 cannot be accurately calculated during circuit design, which increases the difficulty of frequency compensation

In order to ensure that the designed circuit can work stably, it is usually necessary to further sacrifice the performance of the LDO

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