Multi-order non-volatility memory and manufacturing method and operation method therefor

Abstract

The present invention relates to a multi step nonvolatility memory and comprises a storing unit on the base board. The storing unit comprises a controlling grid, an electricity storing layer, an adulteration area, a selective grid and an assisting grid; the controlling grid is arranged on the base board; the electricity storing layer is arranged between the controlling grid and the base board; the adulteration area is positioned in the first side base board of the controlling grid; the selective grid is positioned on the side wall of the first side of the controlling grid and is positioned on the base board between the controlling grid and the adulteration area; the assisting grid is positioned on the side wall of the second side of the controlling grid; and the base board will form a reversion layer under the assisting grid when the assisting grid is exerted with the voltage.

Description

technical field [0001] The invention relates to a semiconductor element, in particular to a multi-level non-volatile memory and its manufacturing method and operation method. Background technique [0002] Non-volatile memory elements have become widely used in personal computers and electronic devices because they can store, read, and erase data multiple times, and the stored data will not disappear after power off. A memory element used. [0003] Typical non-volatile memory devices use doped polysilicon to make floating gates (Floating Gate) and control gates (Control Gate). The control gate is directly arranged on the floating gate, the floating gate and the control gate are separated by a dielectric layer, and the floating gate and the substrate are separated by a tunnel oxide layer (TunnelOxide) (the so-called stack gate flash memory). Moreover, in order to avoid the problem of misjudgment of data caused by excessive erasure phenomenon when the memory is erased. Ther...

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Problems solved by technology

[0005] However, when the memory in the NOR type non-volatile memory is used as a multi-level memory cell, since the starting voltage distribution range for distinguishing each data state is small

In this way, in the programming operation of the existing NOR type non-volatile memory, it is necessary to perform multiple programming steps and programming confirmation steps, so that the programmed memory cells are accurately located in the set initial voltage distribution range, This will take a long time

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