Design method of asynchronous block cipher algorithm coprocessor

Abstract

The invention discloses a design method of an asynchronous block cipher algorithm coprocessor, and the technical problem to be solved is to provide a design method of an asynchronous block cipher algorithm coprocessor. The technical solution is to use each round of iterations in the block cipher algorithm as an independent sub-module; use HDL to design each sub-module and carry out logical synthesis on each sub-module to obtain a static monorail netlist; convert the static monorail netlist into only complementary Composite logic netlist composed of two-input AND gates and OR gates; delay matching for each sub-module, adding a delay matching module with the same delay as the sub-module, and ensuring the delay from the input signal to the output signal of each sub-module The same, and the input arrival time of any AND gate and OR gate is the same; connect each sub-module sequentially to obtain a complete netlist; carry out back-end layout and wiring to obtain the GDS layout. The coprocessor designed by this method has high protection ability against power consumption attack, and has high computing performance and low power consumption characteristics at the same time.

Description

technical field [0001] The invention relates to a design method of a microprocessor, in particular to a design method of a cryptographic algorithm co-processor. Background technique [0002] The security of cryptographic algorithms includes two aspects, one is the security in the mathematical sense of cryptographic algorithms, and the other is the security in the implementation of cryptographic algorithms. Traditional cryptanalysis is a cracking method aimed at the cryptographic algorithm itself, such as differential and linear cryptanalysis. Conventional cryptanalysis and brute force cracking are ineffective for existing widely used cryptographic algorithms. The power consumption attack is an effective method to crack the key by using the weak link in the specific implementation of the cryptographic algorithm, and it is the attack method with the highest security threat in the side-channel attack. Because there is a statistical correlation between the private key in the se...

AI Technical Summary

Problems solved by technology

However, compared with the above constant power consumption logic units such as logic units based on sensitive amplifiers, the constant power consumption characteristics of asynchronous circuits are relatively poor, that is, the protection ability is relatively low

Compared with synchronous circuits, the most significant advantage of asynchronous circuits lies in their low power consumption. The low power consumption design and implementation technology based on asynchronous circuits is also the frontier research content in the field of integrated circuits; but asynchronous circuits do not have computing performance and chip Advantages in terms of area

In addition, the realization of asynchronous circuits is relatively difficult, and there is a lack of mature auxiliary design tools

At present, there is no public report on the asynchronous block cipher algorithm coprocessor that adopts asynchronous circuit design to realize high anti-power attack protection ability, high computing performance and low power consumption.

Images