Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Manufacturing method for multi-layer high-density interconnected printed circuit board

A high-density interconnection, printed circuit board technology, applied in the direction of multi-layer circuit manufacturing, printed circuit components, electrical connection printed components, etc. Complexity and other issues, to achieve the effect of reducing the production cycle, reducing the size of the board, and simplifying the process

Active Publication Date: 2009-10-21
JIANGNAN INST OF COMPUTING TECH
View PDF5 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] However, the above-mentioned process of making a multilayer printed circuit board is too complicated, and it needs to go through the process of making a wiring layer→laying a conductive layer→applying a dry film→making a copper pillar pattern→electroplating→......
The process of this process is relatively complicated. In steps 6 and 7, after removing the dry film and etching the conductive layer, the conductive layer needs to be deposited again, and the production cycle is too long; moreover, due to the need to etch twice before and after, the accuracy of the line Not guaranteed, critical for HDI PCBs with characteristic impedance requirements

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Manufacturing method for multi-layer high-density interconnected printed circuit board
  • Manufacturing method for multi-layer high-density interconnected printed circuit board
  • Manufacturing method for multi-layer high-density interconnected printed circuit board

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0027] This embodiment provides a method for manufacturing a multilayer high-density interconnection printed circuit board. Refer to the attached Figure 4 In the process flow diagram shown, in step S300, a substrate is provided, and one or two circuit planes of the substrate have a first wiring layer, and the first wiring layer is formed on the first wiring layer for interconnection between the wiring layers. a first conductive bump,

[0028] Step S301, 1) forming an insulating medium layer covering the first wiring layer and the first conductive bump on the substrate, and performing planarization treatment to expose the end surface of the first conductive bump;

[0029] Step S302, 2) forming a conductive layer on the insulating dielectric layer;

[0030] Step S303, 3) forming a first insulating layer on the conductive layer and forming a second wiring layer pattern on the first insulating layer;

[0031] Step S304, 4) depositing a conductive material on the conductive laye...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A method for manufacturing a multi-layer high-density interconnection printed circuit board. One or two circuit surfaces of a substrate are provided with a first wiring layer, and a first wiring layer is formed on the first wiring layer for interconnection between the wiring layers. A conductive bump, comprising: forming an insulating medium layer covering the first wiring layer and the first conductive bump on a substrate; forming a conductive layer on the insulating medium layer; forming a first insulating layer on the conductive layer and forming a first insulating layer on the first forming a second wiring layer pattern on the insulating layer; depositing a conductive material to form a second wiring layer; forming a second insulating layer on the second wiring layer and the first insulating layer; etching the second insulating layer to form an opening, the The opening exposes the second wiring layer; the second conductive bump is deposited in the opening; the second insulating layer is removed, and the first insulating layer and the conductive layer located under the first insulating layer are removed; and the steps are repeated to form multiple layers high-density interconnect printed circuit board. The method greatly simplifies the process flow.

Description

technical field [0001] The invention relates to the technical field of printed circuit board manufacturing, in particular to a method for manufacturing a multilayer high-density interconnected printed circuit board. Background technique [0002] In recent years, the design of various electronic products has become increasingly light, thin, short, and small, resulting in the relative miniaturization and weight reduction of various electronic components or printed circuit boards used to install electronic components. Therefore, the high density of printed circuit boards requirements are also increasing. In order to achieve a high-density printed circuit board, the method of increasing the wiring density in the wiring layer can be used, and the method of stacking the wiring layers into multiple layers to form a multilayer printed circuit board can also be used. [0003] A conventional method of manufacturing a multilayer high-density interconnection printed circuit board is a ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H05K3/46H05K1/11H05K1/09
Inventor 吴小龙吴梅珠徐杰栋刘秋华郭双全张伯兴
Owner JIANGNAN INST OF COMPUTING TECH
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products