Receiving apparatus, receiving system using this receiving apparatus, and receiving method thereof

A receiving device and a technology for receiving signals, which are applied in transmission systems, two-way working systems, and TV system scanning details, etc., can solve problems such as high cost and increased circuit scale, and achieve low power consumption, reduced circuit scale, and ease of timing. The effect of restriction

Inactive Publication Date: 2009-01-14
PANASONIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] However, in the known digital broadcast receiving apparatus, in order to multiplex the solutions output by the plurality of demodulators adapted to each broadcasting system in units of transmission packets at a rate not lower than the sum of the transmission rates of transmission packets of each broadcasting system To modulate data, a large-scale storage circuit such as a memory for delaying each demodulated data is required, and there is a problem of high cost due to an increase in circuit scale

Method used

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  • Receiving apparatus, receiving system using this receiving apparatus, and receiving method thereof
  • Receiving apparatus, receiving system using this receiving apparatus, and receiving method thereof
  • Receiving apparatus, receiving system using this receiving apparatus, and receiving method thereof

Examples

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Embodiment 1

[0031] FIG. 1 is a block diagram of a receiving apparatus according to Embodiment 1 of the present invention.

[0032] In FIG. 1 , 100 is a receiving device. The receiving device 100 receives two reception signals A and B of digital broadcasting in different broadcasting systems or in the same broadcasting system, and outputs multiplexed data obtained by multiplexing the respective demodulated data outputs, and the multiplexed data. High-speed timing clock and low-speed timing clock connected to data synchronization. 107 is an AV decoder (an example of a video signal processing device). This AV decoder 107 takes the multiplexed data output from the receiving device 100, the high-speed timing clock, and the low-speed timing clock as inputs, and separates the multiplexed data into After the two demodulated data are decoded, one or both of the two demodulated data is used as received data to process the video and audio signals for each broadcast.

[0033] The receiving device 10...

Embodiment 2

[0069] Next, a receiving apparatus and a receiving method according to Embodiment 2 of the present invention will be described with reference to FIG. 5 to FIG. 8 and FIG. 3 . Components that are the same as those of Example 1 in FIGS. 1 and 3 are denoted by the same reference numerals, and explanations thereof are omitted.

[0070] In the second embodiment, a clock generation unit 501 is provided instead of the clock generation unit 103 of the first embodiment, and a multiplexing unit 503 is provided instead of the multiplexing unit 104 .

[0071]The clock generation part 501 of the second embodiment takes the count values ​​N1 and N2 from the rate judging part 105, the control signals (initialization signals) C1 and C2, and the control signal (identification signal) C3 as inputs, and the first selection part 106 After the high-speed timing clock TH is input, the high-speed timing clock TH is output as a high-speed timing clock, and a clock whose average frequency is equal to ...

Embodiment 3

[0093] Next, a receiving apparatus according to Embodiment 3 of the present invention will be described with reference to the drawings. Components that are the same as those in Embodiment 1 in FIG. 1 are designated with systematic symbols, and explanations thereof are omitted.

[0094] Fig. 9 is a composition diagram of a receiving device according to Embodiment 3 of the present invention.

[0095] Receiving device 100 includes demodulation units 101 and 102 , first and second data expansion units 901 and 902 , control signal generation unit 903 , multiplexing unit 904 , clock generation unit 905 , and clock generation unit 906 .

[0096] The first and second data expansion parts 901 and 902 respectively input demodulation data D1 and D2 and timing clocks T1 and T2 synchronized with them from the demodulation parts 101 and 102, and output them alternately in units of one cycle, thereby timing Clocks T1, T2 are divided into timing clocks T1a, T1b, T2a, T2b and output. Moreove...

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Abstract

A receiving apparatus (100) includes demodulation parts (101, 102) for receiving the respective one of received signals of broadast systems to output demodulated data and timing clocks synchronized with the respective demodulated data, a clock generating part (103) for outputting, to an A / V decoder (107), the two timing clocks from the demodulation parts (101, 102) as high-rate and low-rate timing clocks and for outputting a control signal for multiplexing the two demodulated data from the demodulation parts (101, 102), and a multiplexing part (104) for multiplexing, based on the control signal, the two demodulated data to output the multiplexed data to the A / V decoder (107). The A / V decoder (107) receives the multiplexed data and timing clocks from the receiving apparatus (100) to process the video / audio signals of each broadcast.

Description

technical field [0001] The present invention relates to a receiving device for receiving different broadcasting systems such as satellite digital broadcasting and terrestrial digital broadcasting or multiple digital broadcastings of the same broadcasting system, and a receiving system and receiving method using the receiving device. Background technique [0002] In recent years, the digitalization of broadcasting and communication has been advancing with the advancement of digital transmission technology and semiconductor integration technology. [0003] A receiving device and a receiving system for simultaneously receiving a plurality of broadcasts, including: a demodulation unit for demodulating each broadcasting system conforming to a received signal; a multiplexing unit for multiplexing and outputting demodulated data output by each demodulation unit; a multiplexed data separating unit that separates and outputs demodulated data decoded from the multiplexed demodulated d...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04B1/16H04N5/46H04N7/173
CPCH04N5/46H04N21/4622H04N21/4382H04N21/4305H04N5/4401H04N21/426
Inventor 阪井俊介中居祐二
Owner PANASONIC CORP
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